LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 43
LPC1113FHN33/303,5
Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/303,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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3.7 Start-up behavior
3.8 Brown-out detection
UM10398
User manual
Fig 9.
processor status
valid threshold
internal reset
IRC status
Start-up timing
= 1.8V
GND
V
DD
supply ramp-up
time
When the internal Reset is removed, the processor begins executing at address 0, which
is initially the Reset vector mapped from the boot block. At that point, all of the processor
and peripheral registers have been initialized to predetermined values.
See
provides a clean system clock shortly after the supply voltage reaches the threshold value
of 1.8 V.
The LPC111x/LPC11Cxx includes up to levels for monitoring the voltage on the V
this voltage falls below one of the selected levels, the BOD asserts an interrupt signal to
the NVIC. This signal can be enabled for interrupt in the Interrupt Enable Register in the
NVIC in order to cause a CPU interrupt; if not, software can monitor the signal by reading
the NVIC status register (see
forced reset of the chip (see
3. The boot code in the ROM starts. The boot code performs the boot tasks and may
jump to the flash.
Figure 9
for the start-up timing after reset. The IRC is the default clock at Reset and
80 μs
All information provided in this document is subject to legal disclaimers.
starts
IRC
101 μs
Rev. 12 — 24 September 2012
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
Table
Table
33).
54). Four threshold levels can be selected to cause a
boot time
55 μs
user code starts
boot code
execution
UM10398
finishes;
© NXP B.V. 2012. All rights reserved.
user code
DD
43 of 538
pin. If
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