LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 19
LPC1113FHN33/303,5
Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/303,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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3.1 How to read this chapter
3.2 General description
3.3 Pin description
UM10398
User manual
The following functions of the system configuration block depend on the specific part
number:
DEVICE_ID register
The DEVICE_ID register is valid 0x4004 83F4 for parts of the LPC1100, LPC1100C, and
LPC1100L series only.
The device ID cannot be read through the SYSCON block for the LPC1100XL series. Use
the ISP part ID command
C_CAN controller
The C_CAN clock control bit 17 in the SYSAHBCLKCTRL register
C_CAN reset control bit 3 in the PRESETCTRL register
parts LPC11Cxx/101/201/301.
Entering Deep power-down mode
Status of the IRC before entering Deep power-down mode (see
Enabling sequence for UART clock
Requirements for enabling the UART peripheral clock:
NMI source selection register
The NMI source selection register is only available on parts in the LPC1100XL series.
The system configuration block controls oscillators, start logic, and clock generation of the
LPC111x/LPC11Cxx. Also included in this block are registers for setting the priority for
AHB access and a register for remapping flash, SRAM, and ROM memory areas.
Table 6
•
•
•
•
UM10398
Chapter 3: LPC111x/LPC11Cxx System configuration
(SYSCON)
Rev. 12 — 24 September 2012
IRC must be enabled for parts LPC111x/101/201/301 and parts
LPC11Cxx/101/201/301.
IRC status has no effect for parts in the LPC1100L and LPC1100XL series.
The UART pins must be configured in the IOCON block before the UART clock can be enabled
in the
The sequence of configuring the UART pins and the UART clock has no effect for
parts in the LPC1100L and LPC1100XL series and parts LPC1100C series.
shows pins that are associated with system control block functions.
in the SYSAHBCLKCTRL register
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
(Table
399) to obtain the device ID for the LPC1100XL parts.
(Table
21) for parts LPC111x/101/201/301.
(Table
9) are only functional for
Section
(Table
© NXP B.V. 2012. All rights reserved.
3.9.4.2):
21) and the
User manual
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