IS42S16100E-6BLI-TR ISSI, IS42S16100E-6BLI-TR Datasheet - Page 38

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IS42S16100E-6BLI-TR

Manufacturer Part Number
IS42S16100E-6BLI-TR
Description
DRAM 16M 1Mx16 166Mhz SDRAM, 3.3v
Manufacturer
ISSI
Datasheet

Specifications of IS42S16100E-6BLI-TR

Rohs
yes
Data Bus Width
16 bit
Organization
1 Mbit x 16
Package / Case
BGA-60
Memory Size
16 Mbit
Maximum Clock Frequency
166 MHz
Access Time
6 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Maximum Operating Current
180 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Factory Pack Quantity
1000
38
suspend mode on the next CLK rising edge.This command
reduces the device power dissipation by stopping the
device internal clock. Clock suspend mode continues as
long as the CKE pin remains low. In this state, all inputs
other than CKE pin are invalid and no other commands
IS42S16100E, IS45S16100E
Bank Active Command Interval
When the selected bank is precharged, the period trp
has elapsed and the bank has entered the idle state,
the bank can be activated by executing the active
command. If the other bank is in the idle state at that
time, the active command can be executed for that bank
after the period t
banks will be in the active state. When a bank active
command has been executed, a precharge command
must be executed for that bank within the ACT to PRE
Clock Suspend
When the CKE pin is dropped from HIGH to LOW during
a read or write cycle, the IS42/4516100E enters clock
can be executed. Also, the device internal states are
maintained. When the CKE pin goes from LOW to HIGH
clock suspend mode is terminated on the next CLK rising
edge and device operation resumes.
CAS latency = 3
CAS latency = 2, burstlength = 4
COMMAND
COMMAND
COMMAND
rrD
CLK
CLK
has elapsed. At that point both
CKE
CLK
BANK ACTIVE (BANK 0)
BANK ACTIVE (BANK 0)
DQ
ACT 0
ACT 0
READ (BANK 0)
READ 0
t
RRD
t
RCD
ACT 1
D
OUT
BANK ACTIVE (BANK 1)
BANK ACTIVE (BANK 0)
CLOCK SUSPEND
0
READ 0
command period (t
command cannot be executed for an active bank before
t
After a bank active command has been executed and
the trcd period has elapsed, read write (including auto-
precharge) commands can be executed for that bank.
The next command cannot be executed until the recovery
period (t
Since this command differs from the self-refresh command
described previously in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (tref). Thus
the maximum time that clock suspend mode can be held
is just under the refresh cycle time.
ras
Integrated Silicon Solution, Inc. — www.issi.com
(min) has elapsed.
D
OUT
cka
) has elapsed.
1
ras
D
max). Also note that a precharge
OUT
2
D
OUT
3
05/18/2010
Rev. E

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