IS42S16100E-6BLI-TR ISSI, IS42S16100E-6BLI-TR Datasheet - Page 33

• Manufacturer Part Number: IS42S16100E-6BLI-TR
• Description: DRAM 16M 1Mx16 166Mhz SDRAM, 3.3v
• Manufacturer: ISSI

Specifications of IS42S16100E-6BLI-TR

• Rohs: yes
• Data Bus Width: 16 bit
• Organization: 1 Mbit x 16
• Package / Case: BGA-60
• Memory Size: 16 Mbit
• Maximum Clock Frequency: 166 MHz
• Access Time: 6 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V
• Maximum Operating Current: 180 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 1000

IS42S16100E, IS45S16100E
Precharge
The precharge command sets the bank selected by pin A11
to the precharged state.This command can be executed at
a time t
to the same bank. The selected bank goes to the idle
state at a time t
command, and an active command can be executed again
for that bank.
If pin A10 is low when this command is executed, the bank
selected by pin A11 will be precharged, and if pin A10 is
HIGH, both banks will be precharged at the same time.This
input to pin A11 is ignored in the latter case.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
05/18/2010
CAS latency = 2, burstlength = 4
CAS latency = 3, burstlength = 4
ras
COMMAND
COMMAND
following the execution of an active command
rp
CLK
CLK
following the execution of the precharge
DQ
DQ
READ (CA=A, BANK 0)
READ (CA=A, BANK 0)
READ A0
READ A0
PRECHARGE (BANK 0)
D
OUT
A0 D
D
PRE 0
PRE 0
OUT
OUT
Read Cycle Interruption
Using the Precharge Command
A read cycle can be interrupted by the execution of the
precharge command before that cycle completes. The
delay time (t
command to the completion of the burst output is the
clock cycle of CAS latency.
A0 D
A1 D
PRECHARGE (BANK 0)
CAS Latency
t
RQL
OUT
OUT
t
rql
A1 D
A2
t
rql
RQL
) from the execution of the precharge
OUT
HI-Z
A2
HI-Z
3
3
2
2
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