MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 153

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

Figure 74: Data Strobe Timing – READs
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
early strobe
DQS, DQS#
DQS, DQS#
late strobe
CK#
CK
t
LZDQS (MIN)
T0
t
LZDQS (MAX)
t
RPRE
t
parameters are referenced to a specific voltage level that specifies when the device out-
put is no longer driving
ure 75 (page 154) shows a method of calculating the point when the device is no longer
driving
at two different voltages. The actual voltage measurement points are not critical as long
as the calculation is consistent. The parameters
are defined as single-ended.
HZ and
t
DQSCK (MIN)
t
RPRE
Bit 0
RL measured
to this point
t
HZDQS and
t
LZ transitions occur in the same access time as valid data transitions. These
T1
t
t
DQSCK (MAX)
QSH
Bit 0
Bit 1
t
t
QSH
DQSCK (MIN)
t
QSL
t
Bit 1
HZDQ, or begins driving
Bit 2
t
HZDQS and
t
T2
QSL
t
DQSCK (MAX)
t
QSH
Bit 2
153
Bit 3
t
t
QSH
t
DQSCK (MIN)
QSL
1Gb: x8, x16 Automotive DDR3 SDRAM
Bit 4
Bit 3
t
HZDQ, or begins driving
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
T3
QSL
t
DQSCK (MAX)
Bit 4
Bit 5
t
LZDQS,
t
t
DQSCK (MIN)
LZDQS,
Bit 5
Bit 6
t
T4
LZDQ, by measuring the signal
t
DQSCK (MAX)
t
LZDQ,
Bit 6
Bit 7
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t
t
HZDQS (MIN)
t
LZDQS,
RPST
t
HZDQS, and
READ Operation
Bit 7
t
RPST
T5
t
t
HZDQS (MAX)
LZDQ. Fig-
t
HZDQ
T6