ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 96
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ATTINY26L8SU SL383
Manufacturer Part Number
ATTINY26L8SU SL383
Description
MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
Manufacturer
Atmel
Datasheet
1.ATTINY26L8PU.pdf
(185 pages)
- Current page: 96 of 185
- Download datasheet (3Mb)
Analog to Digital
Converter
Features
96
ATtiny26(L)
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The ATtiny26(L) features a 10-bit successive approximation ADC. The ADC is con-
nected to an 11-channel Analog Multiplexer which allows eight differential voltage input
combinations or 11 single-ended voltage inputs constructed from seven pins from Port A
and four pins from Port B. Seven of the differential inputs are equipped with a program-
mable gain stage, providing amplification steps of 0 dB (1x) and 26 dB (20x) on the
differential input voltage before the A/D conversion. There are four groups of three dif-
ferential analog input channel selections. All input channels in each group share a
common negative terminal, while another ADC input can be selected as the positive
input terminal. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold Amplifier which ensures that the input voltage to
the ADC is held at a constant level during conversion. A block diagram of the ADC is
shown in Figure 51.
The ADC has an analog supply voltage pin, AVCC. The voltage on AVCC must not differ
more than ±0.3V from V
page 107 on how to connect these pins.
An internal reference voltage of nominally 2.56V is provided On-chip, and this reference
may be externally decoupled at the AREF pin by a capacitor.
10-bit Resolution
±2 LSB Absolute Accuracy
0.5 LSB Integral Non-linearity
Optional Offset Cancellation
13 - 260 µs Conversion Time
11 Multiplexed Single Ended Input Channels
8 Differential Input Channels
7 Differential Input Channels with Optional Gain of 20x
Optional Left Adjustment for ADC Result Readout
0 - AVCC ADC Input Voltage Range
Selectable ADC Reference Voltage
Free Running or Single Conversion Mode
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
. See the paragraph “ADC Noise Canceling Techniques” on
1477J–AVR–06/07
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