ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 81

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ATTINY26L8SU SL383

Manufacturer Part Number
ATTINY26L8SU SL383
Description
MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
Manufacturer
Atmel
Datasheet
1477J–AVR–06/07
1. In the same operation, write a logical one to WDCE and WDE. A logical one
2. Within the next four clock cycles, write a logical 0 to WDE. This disables the
• Bits 2..0 – WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1, and 0
The WDP2, WDP1 and WDP0 bits determine the Watchdog Timer prescaling when the
Watchdog Timer is enabled. The different prescaling values and their corresponding
time-out periods are shown in Table 38.
Table 38. Watchdog Timer Prescale Select
Note:
WDP2
0
0
0
0
1
1
1
1
must be written to WDE even though it is set to one before the disable operation
starts.
Watchdog.
1. The frequency of the Watchdog Oscillator is voltage dependent. The WDR – Watch-
WDP1
dog Reset – instruction should always be executed before the Watchdog Timer is
enabled. This ensures that the reset period will be in accordance with the Watchdog
Timer prescale settings. If the Watchdog Timer is enabled without reset, the Watch-
dog Timer may not start counting from zero.
0
0
1
1
0
0
1
1
WDP0
0
1
0
1
0
1
0
1
1,024K (1,048,576)
2,048K (2,097,152)
Oscillator Cycles
Number of WDT
128K (131,072)
256K (262,144)
512K (524,288)
16K (16,384)
32K (32,768)
64K (65,536)
(1)
Typical Time-out
at V
17.1 ms
34.3 ms
68.5 ms
0.14 s
0.27 s
0.55 s
CC
1.1 s
2.2 s
= 3.0V
ATtiny26(L)
Typical Time-out
at V
16.3 ms
32.5 ms
65 ms
0.13 s
0.26 s
0.52 s
CC
1.0 s
2.1 s
= 5.0V
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