MN85571AC PANASONIC [Panasonic Semiconductor], MN85571AC Datasheet - Page 4

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MN85571AC

Manufacturer Part Number
MN85571AC
Description
Single-Chip Audio/Video MPEG2 Encoder
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet
MN85571AC
4
2. Indirect addressing resources (registers and initial load memory)
indirect access address register and reading or writing the INDAT0 indirect access data register. Other than the regis-
ters used for communication with the external host and the SRISC, these resources can only be accessed in the slave
state. While these resources have a structure that consists of 16 bits per address, indirect addressing access writes must
be performed in 32-bit units. Tables 2 and 3 show the address maps.
Table 2. Indirect Addressing Resources Address Map Overview
Note) *1: The notation indir adr indicates the value stored in the INADR0 indirect access address register when
Table 3. Indirect Addressing Resources (Registers) Address Map
Note) 1. *: The notation indir adr indicates the value stored in the INADR0 indirect access address register when
Internal Resource Mapping (continued)
These internal resources are accessed by storing the address of the indirect addressing resource in the INADR0
$A000
$D000
$0000
$0200
$0400
$0600
$1000
$1800
$4000
$8000
$9000
$0000
$0010
$0014
$0015
$0020
$0021
$0022
$0026
*2: Data only exists at even addresses.
2.
indir adr
indir adr
accessing an indirect addressing resource.
: Both read and write access allowed. W: Write access allowed (Cannot be read.) : No access is allowed.
accessing an indirect addressing resource.
Chip operation is not guaranteed if registers for which access is only allowed in the slave state are
accessed in either the run or hold states.
Chip operation is not guaranteed if areas indicated as reserved are accessed.
$000F
$0013
$001F
$0025
$01FF
$01FF
$03FF
$05FF
$0FFF
$17FF
$3FFF
$7FFF
$8FFF
$9FFF
$CFFF
$FFFF
* 1
*
Communication registers, parameter registers, and other registers
Reserved
Video encoding block RISC data memory (VDM): 1K words 16 bits
Reserved
Reserved
Multiplexing block RISC data memory (SDM): 2K words
Reserved
Reserved
Video input block parameter register
Reserved
DMA data I/O block parameter register
Reserved
Code output block parameter register
Reserved
Video input intensity conversion data memory (ITDM) A: 256 words 8 bits
Video input intensity conversion data memory (ITDM) A: 256 words 8 bits
Video encoding block RISC instruction memory (VIRAM): 8K words 32 bits
Multiplexing block RISC instruction memory (SIRAM): 6K words × 24 bits 24 bits
External host/SRIC communication register
Description
SDD00023AEM
Description
Name
hifreg
vifreg
difreg
cifreg
Run/Hold
16 bits
Slave
* 2
W
W
W
* 2
* 2
* 2

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