DM9161CI DAVICOM [Davicom Semiconductor, Inc.], DM9161CI Datasheet - Page 24

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DM9161CI

Manufacturer Part Number
DM9161CI
Description
Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet

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8.1 Basic Mode Control Register (BMCR) - 00
26
0.15
0.14
0.13
0.12
0.11
0.10
0.9
Bit
Auto-negotiation
Auto-negotiation
Speed selection
Power down
Bit Name
Loopback
Restart
enable
Isolate
Reset
0, RW/SC Reset
0,RW/SC
Default
0, RW
1, RW
1, RW
0, RW
0,RW
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
1=Software reset
0=Normal operation
This bit sets the status and controls the PHY registers to their
default states. This bit, which is self-clearing, will keep returning a
value of one until the reset process is completed
Loopback
Loop-back control register
1 = Loop-back enabled
0 = Normal operation
When in 100Mbps operation mode, setting this bit may cause the
descrambler to lose synchronization and produce a 720ms "dead
time" before any valid data appears at the MII receive outputs
Speed Select
1 = 100Mbps
0 = 10Mbps
Link speed may be selected either by this bit or by auto-negotiation.
When auto-negotiation is enabled and bit 12 is set, this bit will
return auto-negotiation selected medium type
Auto-negotiation Enable
1 = Auto-negotiation is enabled, bit 8 and 13 will be in auto-
negotiation status
Power Down
While in the power-down state, the PHY should respond to
management transactions. During the transition to power-down
state and while in the power-down state, the PHY should not
generate spurious signals on the MII
1=Power down
0=Normal operation
Isolate
1 = Isolates the DM9161CI from the MII with the exception of the
serial management. (When this bit is asserted, the DM9161CI does
not respond to the TXD [0:3], TX_EN, and TX_ER inputs, and it
shall present a high impedance on its TX_CLK, RX_CLK, RX_DV,
RX_ER, RXD [0:3], COL and CRS outputs. When PHY is isolated
from the MII it shall respond to the management transactions)
0 = Normal operation
Restart Auto-negotiation
1 = Restart auto-negotiation. Re-initiates the auto-negotiation
process. When auto-negotiation is disabled (bit 12 of this register
cleared), this bit has no function and it should be cleared. This bit is
self-clearing and it will keep returning to a value of 1 until auto-
negotiation is initiated by the DM9161CI. The operation of the auto-
negotiation process will not be affected by the management entity
that clears this bit
0 = Normal operation
Description
Version: DM9161CI-DS-F01
DM9161CI
February 22, 2012
Final

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