DM9161CI DAVICOM [Davicom Semiconductor, Inc.], DM9161CI Datasheet - Page 2

• Manufacturer Part Number: DM9161CI
• Description: Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

1. GENERAL DESCRIPTION.................................................................................................................................................................. 4
2. FEATURES ............................................................................................................................................................................................ 4
3. BLOCK DIAGRAM ............................................................................................................................................................................... 5
4. PIN CONFIGURATION: ....................................................................................................................................................................... 6
5. PIN DESCRIPTION............................................................................................................................................................................... 7
6. LED CONFIGURATION.....................................................................................................................................................................14
7. FUNCTIONAL DESCRIPTION .........................................................................................................................................................16
8. MII REGISTER DESCRIPTION.........................................................................................................................................................25
9. DC AND AC ELECTRICAL CHARACTERISTICS .......................................................................................................................39
2
4.1 48-
5.1 N
5.2 M
5.3 LED I
5.4 M
5.5 B
5.6 P
5.7 T
5.8 P
6.1 LED F
7.1 MII I
7.2 100B
8.1 B
8.2 B
8.3 PHY ID I
8.4 PHY ID I
8.5 A
8.6 A
8.7 A
8.8 DAVICOM S
8.9 DAVICOM S
8.10 10BASE-T C
8.12 (S
8.13 DAVICOM S
8.14 DAVICOM S
8.15 DAVICOM S
8.16 DAVICOM H
8.17 P
9.1 A
9.2 O
9.3 DC E
ABLE A
IAS AND
OWER
IN
ASIC
ASIC
UTO
UTO
UTO
BSOLUTE
ORMAL
PERATING
EDIA
ODE
OWER
PIN
PECIFIED CONFIG
M
NTERFACE
ASE
-
-
-
LECTRICAL
NTERFACE
APS OF
.................................................................................................................................................................................................. 9
M
M
NEGOTIATION
NEGOTIATION
NEGOTIATION
UNCTION
I
LQFP...................................................................................................................................................................................... 6
NTERFACE
.............................................................................................................................................................................................12
(M
ODE
ODE
DENTIFIER
DENTIFIER
MII I
-TX O
S
C
AVING
M
LOCK
EDIA
C
AXIMUM
C
S
NTERFACE
N
PECIFIED
PECIFIED
ONDITIONS
..................................................................................................................................................................................16
TATUS
PECIFIED
PECIFIED
PECIFIED
ONTROL
ONFIGURATION
ARDWARE
ORMAL
PERATION
D
T
................................................................................................................................................................................. 9
C
..............................................................................................................................................................................12
C
YPE
ESCRIPTION
HARACTERISTICS
.............................................................................................................................................................................. 9
ONTROL
R
R
A
L
E
) R
EGISTER
EGISTER
R
INK
R
DVERTISEMENT
XPANSION
S
MII, R
C
C
ATINGS
EGISTER
R
EGISTER
ELECTION
I
R
D
.................................................................................................................................................................... 7
ONFIGURATION
ONFIGURATION AND
NTERRUPT
P
.................................................................................................................................................................39
EGISTER
R
................................................................................................................................................................18
ECEIVE
ISCONNECT
ARTNER
ESET
R
EDUCED
/S
EGISTER
.........................................................................................................................................................15
#1 (PHYID1) - 02...........................................................................................................................28
#2 (PHYID2) - 03...........................................................................................................................28
(25°C)............................................................................................................................................39
TATUS
R
(BMSR) - 01...............................................................................................................................27
– 20 .............................................................................................................................................35
L
)..................................................................................................................................................12
E
EGISTER
ATCH
(BMCR) - 00............................................................................................................................26
A
RROR
R
(DVDD = 3.3V) .....................................................................................................................40
BILITY
MII,
R
EGISTER
C
(PSCR) – 29 ....................................................................................................................38
(10BTCSR) - 18..............................................................................................................34
EGISTER
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
OUNTER
R
S
C
TATE
EGISTER
AND
(ANER) - 06 ..............................................................................................................31
R
OUNTER
S
EGISTER
TATUS
10B
– 21......................................................................................................................36
R
(ANAR) - 04......................................................................................................29
R
EGISTER
EGISTER
(DSCR) - 16..................................................................................................31
ASE
Content
R
R
EGISTER
(ANLPAR) – 05.......................................................................................30
-T GPSI (7-W
EGISTER
(RLSR) – 24......................................................................................38
(DISCR) – 23..................................................................................37
(RECR) – 22.............................................................................36
(DSCSR) - 17 .........................................................................33
IRED
) M
ODE
.....................................................................12
Version: DM9161CI-DS-F01
DM9161CI
February 22, 2012
Final