DM9161CI DAVICOM [Davicom Semiconductor, Inc.], DM9161CI Datasheet - Page 14

• Manufacturer Part Number: DM9161CI
• Description: Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

7. Functional Description
The DM9161CI Fast Ethernet single chip transceiver,
providing the functionality as specified in IEEE 802.3u,
integrates a complete 100Base-TX module and a complete
10Base-T module. The DM9161CI provides a Media
Independent Interface (MII) as defined in the IEEE 802.3u
standard (Clause 22).
7.1 MII Interface
The DM9161C provides a Media Independent Interface (MII)
as defined in the IEEE 802.3u standard (Clause 22).
The purpose of the MII interface is to provide a simple, easy
to implement connection between the MAC Reconciliation
layer and the PHY. The MII is designed to make the
differences between various media transparent to the MAC
sub layer.
The MII consists of a nibble wide receive data bus, a nibble
wide transmit data bus, and control signals to facilitate data
transfers between the PHY and the Reconciliation layer.
•
16
TXD (transmit data) is a nibble (4 bits) of data that are
driven by the reconciliation sub layer synchronously
MII Interface
MII Interface
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
Carrier
Sense
Carrier
Management
Sense
MII Serial
Management
Interface
MII Serial
Figure 7-1
Interface
100Base-TX
100Base-TX
Detection
Collision
The DM9161CI performs all PCS (Physical Coding Sub
layer), PMA (Physical Media Access), TP-PMD (Twisted
Pair Physical Medium Dependent) sub layer, 10Base-T
Encoder/Decoder, and Twisted Pair Media Access Unit
(TPMAU) functions. Figure 7-1 shows the major functional
blocks implemented in the DM9161CI.
•
•
Transmitter
Tranceiver
10Base-T
100Base-TX
100Base-TX
Receiver
Detection
Collision
Transmitter
Tranceiver
10Base-T
Receiver
with respect to TXCLK. For each TXCLK period, which
TXEN is asserted, TXD (3:0) are accepted for
transmission by the PHY.
TXCLK (transmit clock) output to the MAC reconciliation
sub layer is a continuous clock that provides the timing
reference for the transfer of the TXEN, TXD, and TXER
signals.
TXEN (transmit enable) input from the MAC
reconciliation sub layer indicates that nibbles are being
presented on the MII for transmission on the physical
medium.
Auto MDIX
Auto MDIX
Negotiation
Negotiation
Auto
Auto
Version: DM9161CI-DS-F01
DM9161CI
February 22, 2012
Final