LUCL9310AP-D AGERE [Agere Systems], LUCL9310AP-D Datasheet - Page 48
LUCL9310AP-D
Manufacturer Part Number
LUCL9310AP-D
Description
Line Interface and Line Access Circuit Full-Feature SLIC,Ringing Relay,and Test Access Device
Manufacturer
AGERE [Agere Systems]
Datasheet
1.LUCL9310AP-D.pdf
(60 pages)
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Full-Feature SLIC, Ringing Relay, and Test Access Device
ac Applications
First-Generation Codec ac Interface Network: Resistive Termination
Example 1, Real Termination (continued)
Notes:
Termination impedance = 600
Hybrid balance = 600
Tx = 0 dBm.
Rx = 0 dBm.
Figure 16. Agere T7504 First-Generation Codec Resistive Termination, Nonmeter Pulse Application, Single
48
FUSIBLE
FUSIBLE
OR PTC
OR PTC
50
50
V
BAT
RINGING
SOURCE
SECONDARY
SECONDARY
180 V—330 V
PROTECTOR
100 V—130 V
PROTECTOR
64.9 k
R
33.2 k
R
400
1 M
R
R
59 k
VPROG
VREF
R
Battery Operation
RTF
LCTH
G1
0.1 F
C
RTI
0.015 F
V
PT
PWR
T
R
RSW
RTS
PR
OVH (DEFAULT OVERHEAD)
LCTH (10 mA)
V
V
CF1
(continued)
C
BAT2
RING
PROG
REF
RING
F2
CF2
/
MICROPROCESSOR
V
V
(I
BAT1
BAT1
LIMIT
MULTIPLEXED
B3
C
0.1 F
DATA BUS
VBAT1
TO/FROM
B2 B1 B0
= 40 mA)
BGND
V
V
CC
CC
NSTAT RESET LATCH
0.1 F
C
(GAIN OF 8)
CC
L9310
AGND V
MICROPROCESSOR
V
A
DD
DD
0.1 F
PER-LINE
TO/FROM
C
DD
DGND
TESTLEV TESTSIG
ICM
D
PPMOUT
TRGDET
PPMIN
RCVN
RCVP
VITR
LCF
FB2
FB1
TXN
VTX
ITR
TXI
V
REF
V
R
43.2 k
REF
GP
R
6.34 k
C
0.15 F
R
140 k
100 k
GX
TX
T3
R
49.9 k
RCV
R
T6
V
REF
R
100 k
R
28.3 k
0.33 F
0.1 F
HB1
(continued)
GN
C
C
C2
C1
VFXIN
100 k
V
R
FRO
X
–
+
1/4 T7504
Agere Systems Inc.
+2.4 V
CODEC
MCLK
FSEP
ASEL
FSE
GSX
DX
DR
July 2001
PCM
HIGHWAY
SYNC
AND
CLOCK
CONTROL
INPUTS
12-3521g (F)
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