LUCL9310AP-D AGERE [Agere Systems], LUCL9310AP-D Datasheet - Page 12

• Manufacturer Part Number: LUCL9310AP-D
• Description: Line Interface and Line Access Circuit Full-Feature SLIC,Ringing Relay,and Test Access Device
• Manufacturer: AGERE [Agere Systems]

Full-Feature SLIC, Ringing Relay, and Test Access Device
Pin Information
Table 1. Pin Descriptions (continued)
12
Pin
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
TESTLEV
PPMOUT
TRGDET
Symbol
RESET
RRING
LATCH
TRING
NSTAT
DGND
RSW
RTS
VTX
ICM
V
PR
PT
B3
B2
B1
B0
DD
Type
(continued)
I/O
I/O
O
O
O
O
O
G
O
O
P
I
I
I
I
I
I
I
I
I
Test Level Output. This output pin will provide a voltage that is proportional to either
the dc line voltage, dc line current, ac line voltage, ac line current, or internal refer-
ence voltage, dependent upon which operational state is selected.
PPM Out. Connect a resistor from this node to ITR for hybrid cancellation of meter
pulse signal.
Ring Trip Sense. Sense input for the ring trip detector.
Ring Lead Ringing Access Switch. Ringing relay connects this pin to pin RRING.
Connect this pin to pin PR through a 400
Ringing Access. Input to solid-state ringing access switch. Connect to ringing gen-
erator.
Protected Ring. The output of the ring driver amplifier and input to loop sensing
connected through solid-state break switch. Connect to subscriber loop through
overvoltage/current protection.
Protected Tip. The output of the tip driver amplifier and input to loop sensing con-
nected through solid-state break switch. Connect to subscriber loop through over-
voltage/current protection.
Tip Ringing Return. Ring relay connects this pin to PT. Connect to ringing supply
return.
Loop Status. The output of the loop status detector (loop start detector wired-OR
with ring trip detector). This loop status supervision output is not controlled by the
data latch.
Data Control Input. See Table 2, Primary Control States and Table 3, Secondary
Control States for details.
Data Control Input. See Table 2, Primary Control States and Table 3, Secondary
Control States for details.
Data Control Input. See Table 2, Primary Control States and Table 3, Secondary
Control States for details.
Data Control Input. See Table 2, Primary Control States and Table 3, Secondary
Control States for details.
Reset. A logic low will override the B[0:3] and LATCH inputs and reset the state of
the SLIC to the disconnect state and the switch to the all-off state.
Latch Control Input. Edge-level sensitive control for data latches.
5 V Digital Power Supply. 5 V supply for digital circuitry.
Digital Ground. Ground return for V
Tip/Ring Ground Detect. When high, this open collector output indicates the pres-
ence of a ring ground or a tip ground. This supervision output may be used in ground
start, ground key, or common-mode fault detection applications. It has an internal
pull-up.
Common-Mode Current Sense. To program tip or ring ground sense threshold,
connect a resistor to ground and connect a capacitor to AGND to filter 50 Hz/60 Hz.
If unused, the pin is connected to ground.
Tip/Ring Voltage Output. This output is a voltage that is directly proportional to the
differential tip/ring current. A resistor from this node to ITR sets the device transim-
pedance. Gain shaping for termination impedance with a COMBO I codec is also
achieved with a network from this node to ITR.
Name/Function
DD
current.
current-limiting resistor.
Agere Systems Inc.
July 2001