EMC6D103-CK SMSC [SMSC Corporation], EMC6D103-CK Datasheet - Page 63

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EMC6D103-CK

Manufacturer Part Number
EMC6D103-CK
Description
FAN CONTROL DEVICE WITH HIGH FREQUENCY PWM
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.12
INPUT
Register
Address
Vccp
2.5V
VCC
12V
5V
4Ch
4Dh
4Ah
4Bh
44h
45h
46h
47h
48h
49h
VOLTAGE
NOMINAL
2.25V
12.0V
2.5V
3.3V
5.0V
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Software uses the information in this register to determine the voltage that the processor is designed
to operate at. With this information, software can then dynamically determine the correct values to
place in the Vccp Low Limit and Vccp High Limit registers.
This register is read only – a write to this register has no effect.
Registers 44-4Dh: Voltage Limit Registers
Setting the Lock bit has no effect on these registers.
If a voltage input either exceeds the value set in the voltage high limit register or falls below or equals
the value set in the voltage low limit register, the corresponding bit will be set automatically by the
EMC6D103 in the interrupt status registers (41-42h). Voltages are presented in the registers at ¾ full
scale for the nominal voltage, meaning that at nominal voltage, each input will be C0h, as shown in
Table
8.20.
SETTING AT
REGISTER
VOLTAGE
NOMINAL
Table 8.19 Registers 44-4Dh: Voltage Limit Registers
Register Name
Vccp High Limit
2.5V High Limit
Vccp Low Limit
VCC High Limit
2.5V Low Limit
VCC Low Limit
12V High Limit
12V Low Limit
5V High Limit
C0h
C0h
C0h
C0h
C0h
5V Low Limit
Table 8.20 Voltage Limits vs. Register Setting
MAXIMUM
VOLTAGE
16.00V
3.32V
3.00V
4.38V
6.64V
DATASHEET
(MSb)
Bit 7
7
7
7
7
7
7
7
7
7
7
63
Bit 6
6
6
6
6
6
6
6
6
6
6
SETTING AT
REGISTER
MAXIMUM
VOLTAGE
Bit 5
FFh
FFh
FFh
FFh
FFh
5
5
5
5
5
5
5
5
5
5
Bit 4
4
4
4
4
4
4
4
4
4
4
Bit 3
VOLTAGE
3
3
3
3
3
3
3
3
3
3
MINIMUM
0V
0V
0V
0V
0V
Bit 2
2
2
2
2
2
2
2
2
2
2
Bit 1
MINIMUM VOLTAGE
Revision 0.4 (04-04-05)
1
1
1
1
1
1
1
1
1
1
SETTING AT
REGISTER
(LSb)
Bit 0
0
0
0
0
0
0
0
0
0
0
00h
00h
00h
00h
00h
Default
Value
FFh
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h

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