EMC6D103-CK SMSC [SMSC Corporation], EMC6D103-CK Datasheet
EMC6D103-CK
Related parts for EMC6D103-CK
EMC6D103-CK Summary of contents
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... Two low power modes when monitoring if off: Sleep and Shutdown EMC6D103-CK FOR 24 PIN SSOP PACKAGE EMC6D103-CK-TR FOR 24 PIN SSOP PACKAGE (TAPE AND REEL) EMC6D103-CZC FOR 24 PIN SSOP PACKAGE (LEAD FREE) EMC6D103-CZC-TR FOR 24 PIN SSOP PACKAGE (LEAD FREE, TAPE AND REEL) ...
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... WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 2 DATASHEET Datasheet SMSC EMC6D103 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Datasheet 0.1 Reference Documents System Management Bus (SMBus) Specification, Version 2.0, dated August 3, 2000 ■ Bus Specification, version 2.0, Philips Semiconductors, Dec. 1998 ■ SMSC EMC6D103 3 DATASHEET Revision 0.4 (04-04-05) ...
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... Slave Device Time-Out 5.7 Stretching the SCLK Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.8 SMBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.9 Bus Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.10 SMBus Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Chapter 6 Hardware Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1 Input Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2 Resetting the EMC6D103 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2.1 Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2.2 Soft Reset (Initialization 6.3 Monitoring Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.3.1 Continuous Monitoring Mode 6.3.2 Cycle Monitoring Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4 Interrupt Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.4.1 Diode Fault . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 ...
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... Registers 8Dh: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 8.2.37 Registers 8Eh: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 8.2.38 Registers 90h-93h: TachX Option Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 8.2.39 Registers 94h-96h: PWMx Option Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 8.2.40 Register 97h: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 8.2.41 Register 98h:SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 8.2.42 Register FFh: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Chapter 9 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.1 PWM Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 SMSC EMC6D103 5 DATASHEET Revision 0.4 (04-04-05) ...
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... SMBus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Chapter 10 Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Appendix A ADC Voltage Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Appendix B Example Fan Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 6 DATASHEET Datasheet SMSC EMC6D103 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Datasheet List of Figures Figure 2.1 EMC6D103 24 Pin SSOP Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5.1 Address Selection on EMC6D103 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 6.1 Interrupt Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 7.1 Automatic Fan Control Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 7.2 Automatic Fan Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 7.3 Spin Up Reduction Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 7 ...
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... Table 8.37 Absolute Limit vs. Register Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 8.38 Register 6F: XOR Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 8.39 Register 79h: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 8.40 Register 7Ah: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 8.41 Register 7Bh: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 8 DATASHEET Datasheet SMSC EMC6D103 ...
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... Table 8.58 Register 97h: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 8.59 Register 98h:SMSC Test Register Table 8.60 Register FFh: SMSC Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 9.1 Timing for PWM[1:3] Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Table 9.2 SMBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Table 10.1 24-Pin SSOP Package Parameters Table A.1 Analog-to-Digital Voltage Conversions for Hardware Monitoring Block SMSC EMC6D103 9 DATASHEET Revision 0.4 (04-04-05) ...
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... The sampling and conversion of each voltage and temperature reading is performed once every monitoring cycle. (This is a power saving mode.) The EMC6D103 can be placed in one of two low-power modes: Sleep mode or Shutdown mode. These modes do not reset any of the registers of the device. In Sleep mode bias currents are on and the internal oscillator is on, but the the A/D converter and monitoring cycle are turned off ...
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... This Environmental Monitoring and Control device (EMC) is offered pin SSOP mechanical package. 2.1 EMC6D103 Pinout SDA 1 2 SCLK 3 VSS 4 VCC 5 VID0 6 VID1 7 VID2 8 VID3 9 TACH3/INT# 10 PWM2/INT# 11 TACH1 12 TACH2 Figure 2.1 EMC6D103 24 Pin SSOP Pinout SMSC EMC6D103 24 PWM1/xTest Out 23 Vccp 22 2.5V 21 12V VID4 EMC6D103 18 Remote1+ 17 Remote1- 16 Remote2+ 15 Remote2- 14 TACH4/Address Select 13 PWM3/Address Enable 11 DATASHEET Revision 0 ...
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... PER FUNCTION POWER (Note 3.1) WELL NOTES I OD3 VCC M I VCC M I VCC M I VCC M I VCC M I VCC M I VCC M I VCC AN I VCC AN I VCC AN I VCC AN I VCC Note 3 VCC Note 3 VCC Note 3 VCC Note 3.2 AN SMSC EMC6D103 ...
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... AN I OD3 Input/Output (Open Drain), 3mA sink Output, 8mA sink, 4mA source. OD8 Output (Open Drain), 8mA sink. IO8 Input/Output, 8mA sink, 4mA source. SMSC EMC6D103 Table 3.1 Pin Description (continued) BUFFER FUNCTION TYPE HARDWARE MONITORING BLOCK (24 OD3 ...
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... Operation, 5V Tolerance The EMC6D103 is intended to operate with a nominal 3.3V power supply. The analog voltage pins are connected to voltage sources at their respective nominal levels. All digital signal pins are 3V switching, but are tolerant to 5V. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features ...
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... DC output. If this possibility exists suggested that a clamp circuit be used. 4.2 Ratings for Operation VCC=+3.3V±10% PARAMETER SYMBOL Temperature-to-Digital Converter Characteristics Internal Temperature Accuracy External Diode Sensor Accuracy SMSC EMC6D103 MIN TYP MAX UNITS o -3 ±0. ±0.25 ...
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... CC I 500 DATASHEET Datasheet UNITS COMMENTS Note 4.1 % LSB %/V sec Note 4.2 Note 4.3 msec kΩ 10 bits Note 4 +4.0 mA (Note V OL (Note 4. µ µA pF All outputs open, all inputs transitioning from/to 0V to/from 3.3V µA 3 µA SMSC EMC6D103 4.5) ...
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... The amount of averaging is programmable. The output of the averaging block produces a 12-bit temperature or voltage reading value. The 8 MSbits go to the reading register and the 4 LSbits to the A/D LSb register. SMSC EMC6D103 for conversion cycle timing for all 17 DATASHEET ...
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... Address Select pulled to VCC through a 10kΩ resistor In this way, there can three EMC6D103 devices on the SMBus at any time. Multiple EMC6D103 devices can be used to monitor additional processors and temperature zones. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features ...
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... Figure 5.1 Address Selection on EMC6D103 5.2 Slave Bus Interface The EMC6D103 device SMBus implementation is a subset of the SMBus interface to the host. The device is a slave-only SMBus device. The implementation in the device is a subset of SMBus since it only supports Write Byte and Read Byte protocols. ...
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... The EMC6D103 will not respond to a general call address of 0000_000. 5.6 Slave Device Time-Out The EMC6D103 supports the slave device timeout as per the SMBus Specification, v2.0. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Table 5.2 SMBus Write Byte Protocol ...
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... SMBALERT# on the next monitoring cycle, provided the INT enable bit has been set back to ‘1’ by software. Note: The INT# signal is an alternate function on the PWM2 and TACH3 pins. The EMC6D103 device will respond to the SMBus Alert Response address even if the INT# signal is not selected as ...
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... INT# signal via the group enable bits for each type of event (i.e., temperature, voltage and fan). See the section titled Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Interrupt Status Registers on page 26. 22 DATASHEET Datasheet SMSC EMC6D103 ...
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... Input Monitoring The EMC6D103 device’s monitoring function is started by writing a ‘1’ to the START bit in the Ready/Lock/Start Register (0x40). Measured values from the analog inputs and temperature sensors are stored in Reading Registers. The values in the reading registers can be accessed via the SMBus interface ...
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... Table 6.2 Conversion Cycle Timing TOTAL VOLTAGE CONVERSIONS 5x8=40 5x1=5 5x16=80 5x32=160 24 DATASHEET Datasheet ALL VOLTAGE READINGS (+2.5V, +5V, +12V, VCCP, AND VCC CONVERSION CYCLE TIME (MSEC) MIN. NOM. MAX. 567 624 693 203 223 248 406 447 496 SMSC EMC6D103 ...
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... Hardware Monitor Block will set a corresponding status bit in the Interrupt Status Registers. If auto fan option is selected, the hardware will adjust the operation of the fans accordingly. See the section titled Auto Fan Control Operating Mode on page SMSC EMC6D103 6.3). Sampling of all values occurs in a nominal 223 ms (default - see 24). Table 6.3 ADC Conversion Sequence ...
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... INT# pin. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features and on page 61. These registers are used to reflect the state of all temperature, Chapter 8, "Register Set," on page 26 DATASHEET Datasheet Register 41h: Interrupt Status 49. SMSC EMC6D103 ...
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... Diode Error condition. See section Diode Fault on page 6.4.1 Diode Fault The EMC6D103 Chip automatically sets the associated diode fault bit to 1 when any of the following conditions occur on the Remote Diode pins: The positive and negative terminal are an open circuit. ■ Positive terminal is connected to VCC ■ ...
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... Status Register 1 or Interrupt Status Register 2 is set. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Register 7Ch: Special Function Register on page 27. The following description assumes that the interrupt enable bits for all 28 DATASHEET Datasheet on page 75. The INTEN 73. Thermal Zones on page 32. SMSC EMC6D103 ...
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... This removes the need for external resistor dividers and allows for a more accurate means of measurement since the voltages are referenced to a known value. Since any of these inputs can be above VCC or below Ground, they are not diode protected to the power rails. The measured values SMSC EMC6D103 LPMD 0 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features shows the values of the analog inputs that correspond to 86. +5V V /3.3V +2. <0.026 <0.017 <0.013 >6.640 >4.383 >3.320 35. 30 DATASHEET Datasheet +1.8V +1. <0.009 <0.008 <0.012 >2.391 >1.992 >2.988 35. SMSC EMC6D103 CCP Auto ...
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... +127 C SENSOR ERROR SMSC EMC6D103 shows several examples of the format of the temperature digital Table 6.6 Temperature Data Format READING (HEX) -127 81h -50 CEh -25 E7h -1 FFh 0 00h 1 01h 25 19h 50 32h 127 7Fh 128 ...
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... Auto Fan Control mode. These zone assignments are as follows: Zone 1 = Remote Diode 1 (Processor) ■ Zone 2 = Ambient (Internal) Temperature Sensor ■ Zone 3 = Remote Diode 2 ■ Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 32 DATASHEET Datasheet SMSC EMC6D103 ...
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... Regardless of all changes made by the BIOS to the limit and parameter registers during configuration, the EMC6D103 will continue to operate based on default values until the Start bit, in the Ready/Lock/Start register, is set. Once the Start bit is set, the EMC6D103 will operate according to the values that were set by BIOS in the limit and parameter registers ...
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... PWM duty cycle. The operation of the fans can be monitored based on reading the temperature and tachometer reading registers and/or by polling the interrupt status registers. The EMC6D103 offers the option of generating an interrupt indicated by the INT# signal located on the PWM2 and TACH3 pins. ...
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... Typically, the delay will be 1/(2*PWM frequency) seconds. 7.1.3.2 Auto Fan Control Operating Mode The EMC6D103 implements automatic fan control. In Auto Fan Mode, this device automatically adjusts the PWM duty cycle of the PWM outputs, according to the flow chart on the following page (see Figure 7.1 Automatic Fan Control Flow Diagramon page PWM outputs are assigned to a thermal zone based on the PWMx Configuration registers (see 6.10, " ...
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... Fan Output Yes PWM At 0%? No Set fan speed based on Auto Fan Rang e Alg orithm* 36 DATASHEET Datasheet Set fan output to Set Fan Output to auto fan mode minimum speed. 0% (63~65) No Temp >= No Hyst Temp (6C~6D) No Yes Fan Output At 0%? for details. SMSC EMC6D103 Yes ...
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... Provided that the fan has adequate cooling capacity for all environmental and power dissipation conditions, this system will maintain the temperature within acceptable limits, while allowing the fan to run slower (and quieter) when less cooling is required. SMSC EMC6D103 shows the control for the auto fan algorithm. The part allows a minimum 37 DATASHEET Revision 0 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features (Fan stays on when temperature is below minimum) Temp Tmax =Tmin +Trange Hysteresis Temperature Tmin Time PWM Duty Cycle Max =FFh Hysteresis min Time Figure 7.2 Automatic Fan Control 38 DATASHEET Datasheet MIN/OFF bit = 1 Time Time SMSC EMC6D103 ...
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... If the current duty cycle is less than the previous ramp rate duty cycle, the ramp rate duty cycle is decremented by ‘1’ until it is less than or equal to the current duty SMSC EMC6D103 duty cycle = 100% tach reading > ...
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... Table 7.1 PWM Ramp Rate PWM RAMP TIME (SEC) (TIME FROM 0% DUTY CYCLE TO 100% DUTY CYCLE) 52.53 26.52 17.595 40 DATASHEET Datasheet Register 62h, 63h: PWM Ramp Figure 7.4 Illustration of PWM 24). TIME PER PWM STEP PWM RAMP (PWM STEP SIZE = RATE 1/255) (HZ) 206 msec 4.85 104 msec 9.62 69 msec 14.49 SMSC EMC6D103 ...
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... The calculated duty cycle, ramping duty cycle, and the PWM output duty cycle are asynchronous ■ to each other, but are all synchronized to the internal 90kHz clock source. SMSC EMC6D103 PWM RAMP TIME (SEC) (TIME FROM 0% DUTY CYCLE TO 100% DUTY (PWM STEP SIZE = CYCLE) 10 ...
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... FFFFh. If the programmed number of edges is detected on or before the counter reaches FFFFh, the reading Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features In this mode, the fan tachometer simply counts the number of 90kHz 42 DATASHEET Datasheet SMSC EMC6D103 ...
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... The Tachometer circuit begins monitoring the tach when the associated PWM output transitions high and the guard time has expired. Each tach circuit will continue monitoring until the programmed number of edges has been detected, whichever comes first. The Fan Tachometer value may be updated every 300ms, 500ms, or 1000ms. SMSC EMC6D103 47.) 43 DATASHEET Linking Fan Tachometers Revision 0 ...
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... Mode 1 should be enabled and the tachometer limit register should be set to FFFFh if a tachometer ■ input is left unconnected. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PWM “ON” (Figure 44 DATASHEET Datasheet 7.5) (Figure 7.5) SMSC EMC6D103 ...
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... Whenever the programmed number of edges is detected, the edge detection ends and the state ■ machine is reset. The tachometer reading register is updated with the tachometer count value at this time. See Note 7.1 SMSC EMC6D103 below for the one exception to this behavior. 45 DATASHEET Revision 0.4 (04-04-05) ...
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... DATASHEET Datasheet (Note 7.3) (30/T ) TachPulse 50% 100% 5347 2662 3554 1774 2662 1330 2126 1063 1768 885 1319 661 878 440 661 332 = TachPulse (Note 7.5) (30/T ) TachPulse 50% 100% 2673 1331 1777 887 1331 665 1063 532 884 442 SMSC EMC6D103 ...
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... The auto fan control logic supports a feature called SpinUp Reduction. If SpinUp Reduction is enabled (SUREN bit), the auto fan control logic will stop driving the PWM output high if the associated TACH input is operating within normal parameters. (Note: SUREN bit is located in the Configuration Register at offset 7Fh) SMSC EMC6D103 MINIMUM RPM AT DUTY CYCLE 100% 50% ...
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... Inhibit fan tachometer interrupts when the associated PWM is ‘OFF’. See the description of the PWM_TACH register. The default configuration is: PWM1 -> TACH1. PWM2 -> TACH2. PWM3 -> TACH3 & TACH4. Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 48 DATASHEET Datasheet SMSC EMC6D103 ...
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Chapter 8 Register Set Definition for the Lock and Start columns: Yes = Register is made read-only when the related bit is set Register is not made read-only when the related bit is set. Reg Read Reg Name ...
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Reg Read Reg Name Addr /Write 3Eh R Company ID 3Fh R Version / Stepping 40h R/W Ready/Lock/Start Note 8.2 41h R-C Interrupt Status Register 1 Note 8.3 42h R-C Interrupt Status Register 2 Note 8.3 43h R VID0-4 44h ...
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Reg Read Reg Name Addr /Write 5Ch R/W PWM 1 Configuration 5Dh R/W PWM 2 Configuration 5Eh R/W PWM 3 Configuration 5Fh R/W Zone 1 Range/PWM 1 Frequency 60h R/W Zone 2 Range/PWM 2 Frequency 61h R/W Zone 3 Range/PWM ...
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Reg Read Reg Name Addr /Write 7Ch R/W Special Function Register Note 8.4 7Dh R Reserved 7Eh R/W Interrupt Enable 1 (Voltages) 7Fh R/W Configuration 80h R/W Interrupt Enable 2 (Fan Tachs) 81h R/W TACH_PWM Association 82h R/W Interrupt Enable ...
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Reg Read Reg Name Addr /Write 92h R/W Tach3 Option 93h R/W Tach4 Option 94h R/W PWM1 Option 95h R/W PWM2 Option 96h R/W PWM3 Option 97h R/W SMSC Test Register 98h R/W SMSC Test Register 99-FEh R Reserved FFh ...
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... TST7 TST6 TST5 TST4 Bit 7 Bit 6 Bit 5 (MSb DATASHEET Datasheet Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value TST3 TST2 TST1 TST0 Bit 0 Default Bit 4 Bit 3 Bit 2 Bit 1 (LSb) Value SMSC EMC6D103 00h N/A N/A ...
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... C0h +5V 5.0V C0h +12V 12.0V C0h The Voltage Reading registers will be updated automatically by the EMC6D103 Chip with a minimum frequency of 4Hz. These registers are read only – a write to these registers has no effect. 8.2.3 Registers 25-27h: Temperature Reading Table 8.5 Registers 25-27h: Temperature Reading Register Read/ Register Name ...
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... DATASHEET Datasheet READING (HEX) 81h . . . CEh . . . 00h . . . 32h . . . 7Fh 80h Bit 0 Default Bit 4 Bit 3 Bit 2 Bit 1 (LSb) Value SMSC EMC6D103 N/A N/A N/A N/A N/A N/A N/A N/A ...
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... In manual mode, when the start bit is set to 1 and the lock bit is 0, the current duty cycle registers are writable to control the PWMs. Note: When the lock bit is set to 1, the current duty cycle registers are Read-Only. The PWM duty cycle is represented as follows: SMSC EMC6D103 Bit 7 Bit 6 Bit 5 ...
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... Version / Stepping The four least significant bits of the Version / Stepping register [3:0] contain the current stepping of the EMC6D103 silicon. Stepping numbers are to begin from a value of 08h, to indicate that the register set is enhanced from previous hardware monitoring standards. The four most significant bits [7:4] reflect the version number, which will be fixed at 0110b ...
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... This register bit becomes read only once it is set. The EMC6D103 sets this bit automatically after the part is fully powered up, has completed the power-up-reset process, and after all A/D converters are functioning (all bias conditions for the A/Ds have stabilized and the A/Ds are in operational mode). (Always reads back ‘ ...
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... Note below). The contents of this register are cleared (set to 0) automatically by the EMC6D103 after it is read by software, if the voltage or temperature no longer violates the limits set in the limit and parameter registers. Once set, the Interrupt Status Register 1 bits remain set until a read event occurs or until the individual enable bits is cleared, even if the voltage or temperature no longer violate the limits set in the limit and parameter registers ...
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... Note below). The contents of this register are cleared (set to 0) automatically by the EMC6D103 after it is read by software, if the voltage no longer violate the limits set in the limit and parameter registers, if the temperature sensor error no loner exists the tach reading register is no longer above the minimum ...
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... R VID0-4 The VID register contains the values of EMC6D103 VID0-VID4 input pins. This register indicates the status of the VID lines that interconnect the processor to the Voltage Regulator Module (VRM). Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Table 8 ...
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... EMC6D103 in the interrupt status registers (41-42h). Voltages are presented in the registers at ¾ full scale for the nominal voltage, meaning that at nominal voltage, each input will be C0h, as shown in Table 8 ...
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... EMC6D103 in the Interrupt Status Register 1 (41h). For example, if the temperature reading from the Remote1- and Remote1+ inputs exceeds the Remote Diode 1 High Temp register limit setting, Bit[ the Interrupt Status Register 1 will be set. The temperature limits in these registers are represented as 8 bit, 2’ ...
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... PWM will be controlled by the hottest of zones 2 and zones 1, 2, and 3. If one of these options is selected, the PWM is controlled by the limits and parameters for the zone that requires the highest PWM duty cycle, as computed by the auto fan algorithm. SMSC EMC6D103 Bit 7 Bit 6 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Table 8.25 Fan Zone Setting PWM CONFIGURATION Fan on zone 1 auto Fan on zone 2 auto Fan on zone 3 auto Fan always on full Fan disabled Fan controlled by hottest of zones 2,3 Fan controlled by hottest of zones 1,2,3 Fan manually controlled 66 DATASHEET Datasheet Table 8.26, "Fan Spin-Up Register" SMSC EMC6D103 ...
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... Below Fan Temp Limit: Fan is off or at Fan PWM Minimum depending on bit[7:5] of register 62h and bit 2 of register 7Fh Temperature Figure 8.1 Fan Activity Above Fan Temp Limit SMSC EMC6D103 Table 8.26 Fan Spin-Up Register SPIN UP TIME 000 0 sec 001 ...
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... Table 8.29 Register Setting vs. Temperature Range RAN[3:0] 0000 0001 0010 0011 0100 0101 0110 Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PWM FREQUENCY 11.0 Hz 14.6 Hz 21.9 Hz 29.3 Hz (default) 35.2 Hz 44.0 Hz 58.6 Hz 87.7 Hz N/A ~25 Khz N/A RANGE (°C) 2 2 DATASHEET Datasheet SMSC EMC6D103 ...
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... RR1E, RR2E, and RR3E enable PWM Ramp Rate Control for PWM 1, 2, and 3 respectively. ■ RR1-2, RR1-1, and RR1-0 control ramp rate time for PWM 1 ■ RR2-2, RR2-1, and RR2-0 control ramp rate time for PWM 2 ■ RR3-2, RR3-1, and RR3-0 control ramp rate time for PWM 3 ■ SMSC EMC6D103 RANGE (°C) 10 13. 26. ...
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... RAMP RATE 1/255) (HZ) 206 msec 4.85 104 msec 9.62 69 msec 14.49 41 msec 24.39 26 msec 38.46 18 msec 55.56 10 msec 100 5 msec 200 Bit 0 Default Bit 4 Bit 3 Bit 2 Bit 1 (LSb) Value VALUE (HEX) 00h . . . 40h . . . 80h . . . FFh SMSC EMC6D103 80h 80h 80h ...
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... Registers 6A-6Ch: Absolute Temperature Limit Table 8.36 Registers 6A-6Ch: Absolute Temperature Limit Register Read/ Register Name Address Write 6Ah R/W Zone 1 Temp Absolute Limit 6Bh R/W Zone 2 Temp Absolute Limit 6Ch R/W Zone 3 Temp Absolute Limit SMSC EMC6D103 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 (MSb ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features ABS LIMIT (DEC) -127 . . . - 127 Bit 7 Bit 6 Bit 5 (MSb) RES RES RES 72 DATASHEET Datasheet ABS LIMIT (HEX) 81h . . . CEh . . . 00h . . . 32h . . . 7Fh Bit 0 Default Bit 4 Bit 3 Bit 2 Bit 1 (LSb) Value RES RES RES RES XEN SMSC EMC6D103 00h ...
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... Table 8.42 Register 7Ch: Special Function Register Register Read/ Register Name Address Write 7Ch R/W Special Function This register becomes read only when the Lock bit is set. Any further attempts to write to this register shall have no effect. SMSC EMC6D103 Bit 7 Bit 6 Bit 5 (MSb) TST7 TST6 TST5 Bit 7 Bit 6 Bit 5 ...
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... Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Table 8.43 AVG[2:0] Bit Decoder AVERAGES PER READING REM DIODE 2 INTERNAL DIODE 128 128 DATASHEET Datasheet (Table 8.43, "AVG[2:0] Bit ALL VOLTAGE READINGS (+2.5V, +5V, +12V, VCCP, AND VCC SMSC EMC6D103 ...
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... R/W Configuration These registers become read only when the Lock bit is set. Any further attempts to write to these registers shall have no effect. This register contains the following bits: Bit[0] TACH3/INT# pin select: 0=TACH, 1=INT# SMSC EMC6D103 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 (MSb) ...
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... Bit[6] Reserved Bit[7] Reserved Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Bit 7 Bit 6 Bit 5 Bit 4 (MSb) RES RES RES TACH4 76 DATASHEET Datasheet Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value TACH3 TACH2 TACH1 TACH 1Eh SMSC EMC6D103 ...
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... Any PWM that has no TACH inputs associated with it must be configured to operate in Mode 1. ■ All TACH inputs must be associated with a PWM output. If the tach is not being driven by the ■ associated PWM output it should be configured to operate in Mode 1 and the associated TACH interrupt must be disabled. SMSC EMC6D103 27. Bit 7 Bit 6 Bit 5 Bit 4 ...
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... V50.1 V50.0 VCC.3 VCC.2 VCC.1 VCC.0 78 DATASHEET Datasheet Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value D2EN D1EN AMB TEMP 0Eh Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value RD1.3 RD1.2 RD1.1 RD1.0 N/A AM.3 AM.2 AM.1 AM.0 N/A V25.3 V25.2 V25.1 V25.0 N/A VCP.3 VCP.2 VCP.1 VCP.0 N/A SMSC EMC6D103 ...
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... This register must not be written. Writing this register may produce unexpected results. 8.2.35 Registers 8Ch: SMSC Test Register Table 8.54 Registers 8Ch: SMSC Test Register Register Read/ Register Name Address Write 8Ch R SMSC Test Register SMSC EMC6D103 th per unit measured. (i.e., Temperature Range: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 (MSb) TST7 TST6 TST5 ...
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... Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value TST3 TST2 TST1 TST0 N/A Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value MODE EDG1 EDG0 SLOW 04h MODE EDG1 EDG0 SLOW 04h MODE EDG1 EDG0 SLOW 04h MODE EDG1 EDG0 SLOW 04h SMSC EMC6D103 ...
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... Opportunistic Mode Disabled. Update Tach Reading once per PWMx Update Period (see Bits[1:0] in this register) 1=Opportunistic Mode is Enabled. The tachometer reading register is updated any time a valid tachometer reading can be made valid reading is detected prior to the Update cycle, then the Update counter is reset. Bit[7:6] Reserved SMSC EMC6D103 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 ...
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... TST5 TST4 82 DATASHEET Datasheet Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value TST3 TST2 TST1 TST0 5Ah Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value F1h TST3 TST2 TST1 TST0 Bit 0 Default Bit 3 Bit 2 Bit 1 (LSb) Value TST3 TST2 TST1 TST0 N/A SMSC EMC6D103 ...
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... Note 9.1 This value is programmable by the PWM frequency bits located in the FRFx registers. Note 9.2 The PWM High Time is based on a percentage of the total PWM period (min=0/256*T max =255/256 t1). PWM SMSC EMC6D103 t1 t2 Figure 9.1 PWMx Output Timing MIN 0.04 9. During Spin-up the PWM High Time can reach a 100% or Full On. ...
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... SCLK line is released DAT 84 DATASHEET Datasheet t HD;STA t SU;STO S P MAX UNITS COMMENTS 400 kHz Note 9 Note 9.4 µs µs µs µs µs 0.9 ns Note 9.5 µs µs 300 ns 300 ns 400 bus. See “The I C Bus Specification,” SMSC EMC6D103 ...
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... Package body dimensions D and E1 do not include the mold protrusion. Maximum mold protrusion is 0.006 inches for ends, and 0.010 inches for sides. 4. Dimension for foot length L measured at the gauge plane 0.010 inches above the seating plane. 5. Details of pin 1 identifier are optional but must be located within the zone indicated. SMSC EMC6D103 MAX REMARKS 0.069 Overall Package Height 0 ...
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... SMSC EMC6D103 ...
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... PWM output. Note: These examples represent the minimum required components. Some designs may require additional components. 3.3V 1k PWMx 2.2k Figure B.1 Fan Drive Circuitry (Apply to PWM Driving Two Fans) SMSC EMC6D103 3.3V MMBT3904 MMBT2222 MMBT2222 87 DATASHEET 12V ...
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... Figure B.3 Fan Tachometer Circuitry (Apply to Each Fan) Revision 0.4 (04-04-05) Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features 3.3V 470 MMBT2222 3.3V Tach 10k D1 IN4148 88 DATASHEET Datasheet 12V Fan M TACH Input SMSC EMC6D103 ...
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... Remote Diode - Figure B.4 Remote Diode (Apply to Remote2 Lines) Notes: 1. 2.2nF cap is optional and should be placed close to the EMC6D103 if used. 2. The voltage at PWM3 must be at least 2.0V to avoid triggering Address Enable. 3. The Remote Diode + and Remote Diode - tracks should be kept close together, in parallel with grounded guard tracks on each side ...