EMC6D103-CK SMSC [SMSC Corporation], EMC6D103-CK Datasheet - Page 59

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EMC6D103-CK

Manufacturer Part Number
EMC6D103-CK
Description
FAN CONTROL DEVICE WITH HIGH FREQUENCY PWM
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.8
Register
Address
BIT
4-7
0
1
2
3
40h
Reserved
READY
START
OVRID
NAME
Read/
LOCK
Write
R/W
The register is used by application software to identify which device has been implemented in the given
system. Based on this information, software can determine which registers to read from and write to.
Further, application software may use the current stepping to implement work-arounds for bugs found
in a specific silicon stepping. This register is read only – a write to this register has no effect.
Register 40h: Ready/Lock/Start Monitoring
Setting the Lock bit makes the Lock bit read only.
Note: There is a start-up time of up to 82ms for monitoring after the start bit is set to ‘1’, during which
The following summarizes the operation of the part based on the Start bit:
1. If Start bit = '0' then:
a. Fans are set to Full On.
b. No voltage, temperature, or fan tach monitoring is performed. The values in the reading registers
c. No Status bits are set.
will be N/A (Not Applicable), which means these values will not be considered valid readings until
the Start bit = '1'. The exception to this is the Tachometer reading registers, which always give the
actual reading on the TACH pins.
time the reading registers are not valid.
R/W
R/W
R/W
R/W
Ready/Lock/Start
Register Name
R
R
Table 8.12 Register 40h: Ready/Lock/Start Monitoring
DEFAULT
Table 8.13 Ready/Lock/Start Monitoring
0
0
0
0
0
When software writes a 1 to this bit, the EMC6D103 enables
monitoring and PWM output control functions based on the limit and
parameter registers. Before this bit is set, the part does not update
register values. Whenever this bit is set to 0, the monitoring and PWM
output control functions are based on the default limits and
parameters, regardless of the current values in the limit and parameter
registers. The EMC6D103 preserves the values currently stored in the
limit and parameter registers when this bit is set or cleared. This bit is
not affected by setting the Lock bit.
Note:
Setting this bit to 1 locks specified limit and parameter registers. Once
this bit is set, limit and parameter registers become read only and will
remain locked until the device is powered off. This register bit becomes
read only once it is set.
The EMC6D103 sets this bit automatically after the part is fully
powered up, has completed the power-up-reset process, and after all
A/D converters are functioning (all bias conditions for the A/Ds have
stabilized and the A/Ds are in operational mode). (Always reads back
‘1’.)
If this bit is set to 1, all PWM outputs go to 100% duty cycle regardless
of whether or not the lock bit is set.
Reserved.
(MSb)
Bit 7
RES
DATASHEET
Bit 6
RES
When this bit is 0, all fans are on full 100% duty cycle, i.e.,
PWM pins are high for 255 clocks, low for 1 clock. When this
bit is 0, the part is not monitoring.
59
Bit 5
RES
Bit 4
RES
DESCRIPTION
OVRID
Bit 3
READY
Bit 2
LOCK
Bit 1
Revision 0.4 (04-04-05)
START
(LSb)
Bit 0
Default
Value
00h

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