SCD1283 INTEL [Intel Corporation], SCD1283 Datasheet - Page 45
SCD1283
Manufacturer Part Number
SCD1283
Description
IEEE 1284-Compatible Parallel Interface
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.SCD1283.pdf
(94 pages)
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5.10.1
Datasheet
Figure 13. Intel 80x86 Family Interface
SYSTEM
80x86
Interfacing to an Intel Microprocessor-Based System
With very little additional logic, the CD1283 can interface to any system based on a processor in
the Intel 80x86 family.
80286-based system. To provide the proper strobes and controls, the IOR* and IOW* control
strobes synthesize the DS* and R/W* signals. DTACK* is an input to wait-state-generation logic
that holds the processor (if necessary) until the CD1283 completes the I/O request.
CONTROL
ADDRESS
INPUTS
READY
DATA
IOW*
DMA
IOR*
IRQ
A[23:7]
Figure 13
shows a generalized view of an I/O-mapped interface with an
GENERATION
ADDRESS
WAIT-STATE
DECODE
LOGIC
LOGIC
IEEE 1284-Compatible Parallel Interface — CD1283
A[6:0]
CS*
SVCACKP*
A[6:0]
DB[15:0]
DS*
R/W*
SVCREQP*
DMAREQ*
DMAACK*
DTACK*
CD1283
45
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