TFRA08C13-DB AGERE [Agere Systems], TFRA08C13-DB Datasheet - Page 24

• Manufacturer Part Number: TFRA08C13-DB
• Description: TFRA08C13 OCTAL T1/E1 Framer
• Manufacturer: AGERE [Agere Systems]

TFRA08C13 OCTAL T1/E1 Framer
Pin Information
Table 2. Pin Descriptions (continued)
24
† After RESET is deasserted, the channel is in the default framing mode, as a function of the DS1/CEPT pin.
‡ Asserting this pin low will initially force RDY to a low state.
* I
u
indicates an internal pull-up, I
AC15
AB26
AA25
AC12
AB25
AF13
AF17
Pins
AC1
AA3
N23
AB1
N26
C10
AB2
D22
A23
B22
Y23
P24
P26
A24
C11
E2
N3
B9
D1
P1
D3
P4
A9
E1
R1
TCHIDATAB[1 ]
TCHIDATAB[2 ]
TCHIDATAB[3 ]
TCHIDATAB[4 ]
TCHIDATAB[5 ]
TCHIDATAB[6 ]
TCHIDATAB[7 ]
TCHIDATAB[8 ]
TCHIDATA[1 ]
TCHIDATA[2 ]
TCHIDATA[3 ]
TCHIDATA[4 ]
TCHIDATA[5 ]
TCHIDATA[6 ]
TCHIDATA[7 ]
TCHIDATA[8 ]
RSSFS [1 ]
RSSFS [2 ]
RSSFS [3 ]
RSSFS [4 ]
RSSFS [5 ]
RSSFS [6 ]
RSSFS [7 ]
RSSFS [8 ]
RFDL[1 ]
RFDL[2 ]
RFDL[3 ]
RFDL[4 ]
RFDL[5 ]
RFDL[6 ]
RFDL[7 ]
RFDL[8 ]
Symbol
(continued)
d
indicates an internal pull-down.
Type*
O
O
O
O
Receive Facility Data Link. Serial output facility data link bit stream
extracted from the receive line data stream by the receive framer. In
DS1-DDS with data link access, this is an 8 kbits/s signal; otherwise,
4 kbits/s. In the CEPT frame format, RFDL can be programmed to one
of the RSa bits of the NOT FAS frame TS0. During loss of frame align-
ment, this signal is 1.
Transmit CHI Data. Serial output system data at 2.048 Mbits/s,
4.096 Mbits/s, or 8.192 Mbits/s. This port is forced into a high-imped-
ance state for all inactive time slots.
Transmit CHI Data B. Serial output system data at 2.048 Mbits/s,
4.096 Mbits/s, or 8.192 Mbits/s. This port is forced into a high-imped-
ance state for all inactive time slots.
Receive Framer Signaling Superframe Sync. This active-high signal
is the CEPT signaling superframe (multiframe) synchronization pulse in
the receive framer.
Description
Preliminary Data Sheet
Lucent Technologies Inc.
Lucent Technologies Inc.
October 2000