S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 88

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 


 
SRB
Operation:
Description:
Example:

n
The SRB instruction selects one of four register banks in the working register memory area. The
constant value used with SRB is 0, 1, 2, or 3. The following table shows the effect of SRB settings:

The enable register bank flag (ERB) must always be set for the SRB instruction to execute
successfully for register banks 0, 1, 2, and 3. In addition, if the ERB value is logic zero, register
bank 0 is always selected, regardless of the SRB value.
If the ERB flag is set, the instruction
SRB
selects register bank 3 (018H-01FH) as the working memory register bank.
ERB Setting
Operand
Operand
n
0
1
n
3
Select register bank
1
0
3
0
0
1
1
0
0
Binary Code
SRB Settings
Operation Summary
2
0
0
1
1
1
0
1
0
1
0
0
1
1
x
d1
0
d0
1
0
0
1
0
1
x
SRB
Operation Notation
n (n = 0, 1, 2, 3)
Selected Register Bank
Always set to bank 0
Bytes
Bank 0
Bank 1
Bank 2
Bank 3
2

 
Cycles
2