S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 71

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 

LDI
Operation:
Description:
Example:
dst,src
A,@HL
The contents of a data memory location are loaded into the accumulator, and the contents of the
register L are incremented by one. If an overflow occurs (e.g., if the resulting value in register L is
0H), the next instruction is skipped. The contents of data memory and the carry flag value are
unaffected.
A,@HL
Assume that register pair HL contains the address 2FH and internal RAM location 2FH contains
the value 0FH:
LD
LDI
JPS
JPS
The instruction 'JPS XXX' is skipped since an overflow occurred after the 'LDI A,@HL' and the
instruction 'JPS YYY' is executed.
Operand
Operand
HL,#2FH
A,@HL
XXX
YYY
Load indirect data memory to A; increment register L
contents and skip on overflow
1
0
0
Binary Code
Operation Summary
0


; A
; Skip
; H
1
0
(HL) and L
2H and L
1
0
0H
A
skip if L = 0H
L+1
(HL), then L
Operation Notation

 


Bytes
1
L+1;
Cycles
2 + S