S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 78

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 



REF
Operation:

Description:


dst
memc
The REF instruction is used to rewrite into 1-byte form, arbitrary 2-byte or 3-byte instructions (or
two 1-byte instructions) stored in the REF instruction reference area in program memory. REF
reduces the number of program memory accesses for a program.
memc
TJP and TCALL are 2-byte pseudo-instructions that are used only to specify the reference area:
1. When the reference area is specified by the TJP instruction,
2. When the reference area is specified by the TCALL instruction,
When the reference area is specified by any other instruction, the 'memc' and 'memc + 1'
instructions are executed.
Instructions referenced by REF occupy 2 bytes of memory space (for two 1-byte instructions or
one 2-byte instruction) and must be written as an even number from 0020H to 007FH in ROM. In
addition, the destination address of the TJP and TCALL instructions must be located with the
3FFFH address. TJP and TCALL are reference instructions for JP/JPS and CALL/CALLS.
If the instruction following a REF is subject to the 'redundancy effect', the redundant instruction is
skipped. If, however, the REF follows a redundant instruction, it is executed.
On the other hand, the binary code of a REF instruction is 1 byte. The upper 4 bits become the
higher address bits of the referenced instruction, and the lower 4 bits of the referenced instruction
becomes the lower address, producing a total of 8 bits or 1 byte (see Example 3 below).
Operand
Operand
memc.7-6 = 00
PC13-0
memc.7-6 = 01
[(SP-1) (SP-2)]
[(SP-3) (SP-4)]
[(SP-5) (SP-6)]
SP
PC13-0
SP-6
memc.5-0 + (memc + 1).7-0
memc.5-0 + (memc + 1).7-0
Reference code
t7
EMB, ERB
PC7-0
PC13-8
t6


t5
Binary Code
Operation Summary
t4
t3
t2
t1
t0
PC13-0
memc.3-0 < 1
Operation Notation
memc.7-4,
Bytes
1

 
Cycles
3