S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 11

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S3C72G9

Manufacturer Part Number
S3C72G9
Description
The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Manufacturer
Samsung semiconductor
Datasheet
 
AND
OR
XOR
COM
ADC
ADS
SBC
SBS
DECS
INCS
Name
Name
A,#im
A,@HL
EA,RR
RRb,EA
A, #im
A, @HL
EA,RR
RRb,EA
A,#im
A,@HL
EA,RR
RRb,EA
A
A,@HL
EA,RR
RRb,EA
A, #im
EA,#imm
A,@HL
EA,RR
RRb,EA
A,@HL
EA,RR
RRb,EA
A,@HL
EA,RR
RRb,EA
R
RR
R
DA
@HL
RRb
Operand
Operand
Table 5-13. Arithmetic Instructions — High-Level Summary
Table 5-12. Logic Instructions — High-Level Summary
Increment register ®; skip on carry
Logical-AND A immediate data to A
Logical-AND A indirect data memory to A
Logical-AND register pair (RR) to EA
Logical-AND EA to register pair (RRb)
Logical-OR immediate data to A
Logical-OR indirect data memory contents to A
Logical-OR double register to EA
Logical-OR EA to double register
Exclusive-OR immediate data to A
Exclusive-OR indirect data memory to A
Exclusive-OR register pair (RR) to EA
Exclusive-OR register pair (RRb) to EA
Complement accumulator (A)
Add indirect data memory to A with carry
Add register pair (RR) to EA with carry
Add EA to register pair (RRb) with carry
Add 4-bit immediate data to A and skip on carry
Add 8-bit immediate data to EA and skip on carry
Add indirect data memory to A and skip on carry
Add register pair (RR) contents to EA and skip on carry
Add EA to register pair (RRb) and skip on carry
Subtract indirect data memory from A with carry
Subtract register pair (RR) from EA with carry
Subtract EA from register pair (RRb) with carry
Subtract indirect data memory from A; skip on borrow
Subtract register pair (RR) from EA; skip on borrow
Subtract EA from register pair (RRb); skip on borrow
Decrement register ®; skip on borrow
Decrement register pair (RR); skip on borrow
Increment direct data memory; skip on carry
Increment indirect data memory; skip on carry
Increment register pair (RRb); skip on carry
Operation Description
Operation Description
   
Bytes
Bytes
2
1
2
2
2
1
2
2
2
1
2
2
2
1
2
2
1
2
1
2
2
1
2
2
1
2
2
1
2
1
2
2
1
Cycles
Cycles
1 + S
2 + S
1 + S
2 + S
2 + S
1 + S
2 + S
2 + S
1 + S
2 + S
1 + S
2 + S
2 + S
1 + S
2
1
2
2
2
1
2
2
2
1
2
2
2
1
2
2
1
2
2


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