ZL50110 ZARLINK [Zarlink Semiconductor Inc], ZL50110 Datasheet - Page 78

• Manufacturer Part Number: ZL50110
• Description: 128, 256 and 1024 Channel CESoP Processors
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

11.4
The TDM Interface can be used to directly drive into a Line Interface Unit (LIU). The interface can work in this mode
with E1, DS1, J2, E3 and DS3. The frame pulse is not present, just data and clock is transmitted and received.
Table 30 shows timing for DS3, which would be the most stringent requirement.
TDM_F0 width
TDM_F0 setup
TDM_F0 hold
TDM_TXCLK Period
TDM_TXCLK High
TDM_TXCLK Low
TDM_RXCLK Period
TDM_RXCLK High
TDM_RXCLK Low
TDM_TXDATA Output Delay
TDM_RXDATA Input Setup
TDM_RXDATA Input Hold
TDM LIU Interface Timing
TDM_HDS Output
TDM_HDS Input
Parameter
Parameter
TDM_C16
TDM_F0
Figure 31 - TDM - H-MVIP Timing Diagram for 16 MHz Clock (8.192 Mbps)
Table 30 - TDM - LIU Structured Transmission/Reception
Table 29 - TDM H-MVIP Timing Specification (continued)
Ts 127 Bit 7
Ch 127 Bit 7
Symbol
Symbol
t
t
t
t
t
t
t
CRP
CRH
t
t
t
CTP
CTH
CRL
CTL
FW
FH
PD
t
t
FS
H
S
t
FS
t
HZD
Zarlink Semiconductor Inc.
t
ZL50110/11/14
FW
Min.
Min.
200
6.7
6.7
9.0
9.0
t
50
50
PD
t t
3
6
3
C16L
t
t
C16P
FH
78
t t
C16H
Ts 0 Bit 0
22.353
22.353
Typ.
Typ.
244
-
-
-
Ch 0 Bit 0
t
S
t
H
Max.
Max.
300
150
150
10
Units
Units
Ts 0 Bit 1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS3 clock
DS3 clock
Data Sheet
Notes
Notes