ZL50110 ZARLINK [Zarlink Semiconductor Inc], ZL50110 Datasheet - Page 73
ZL50110
Manufacturer Part Number
ZL50110
Description
128, 256 and 1024 Channel CESoP Processors
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50110.pdf
(103 pages)
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11.0
11.1
The TDM Bus either operates in Slave mode, where the TDM clocks for each stream are provided by the device
sourcing the data, or Master mode, where the TDM clocks are generated from the ZL50110/11/14.
11.1.1
TDM ST-BUS Slave Timing Specification
ST-BUS
8.192 Mbps
mode
ST-BUS
2.048 Mbps
mode
All Modes
Data Format
TDM Interface Timing - ST-BUS
AC Characteristics
ST-BUS Slave Clock Mode
TDM_CLKi Period
TDM_CLKi High
TDM_CLKi Low
TDM_CLKi Period
TDM_CLKi High
TDM_CLKi Low
TDM_F0i Width
8.192 Mbps
2.048 Mbps
TDM_F0i Setup Time
TDM_F0i Hold Time
TDM_STo Delay
TDM_STi Setup Time
TDM_STi Hold Time
Parameter
Symbol
t
t
t
t
t
t
t
t
t
C16IH
t
t
t
C16IP
C16IL
STOD
FOIW
FOIH
C4IP
C4IH
FOIS
STIS
STIH
C4IL
Zarlink Semiconductor Inc.
ZL50110/11/14
73
Min.
110
110
200
54
27
27
50
5
5
1
5
5
-
244.1
Typ.
60
-
-
-
-
-
-
-
-
-
-
-
Max.
134
134
300
66
33
33
20
-
-
-
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
With respect to
TDM_CLKi
falling edge
With respect to
TDM_CLKi
falling edge
With respect to
TDM_CLKi
Load C
With respect to
TDM_CLKi
With respect to
TDM_CLKi
Data Sheet
Notes
L
= 50 pF
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