ZL50018 ZARLINK [Zarlink Semiconductor Inc], ZL50018 Datasheet - Page 108

• Manufacturer Part Number: ZL50018
• Description: 2 K Digital Switch with Enhanced Stratum 3 DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
Note 1:
Note 2:
10
12 Acknowledgement hold time.
13 DTA drive high to HiZ
11 Acknowledgement delay time.
1
2
3
4
5
6
7
8
9
CS
DS
R/W
A0-A13
D0-D15
DTA
CS de-asserted time
DS de-asserted time
CS setup to DS falling
R/W setup to DS falling
Address setup to DS falling
CS hold after DS rising
R/W hold after DS rising
Address hold after DS rising
Data setup to DTA Low
Data hold after DS rising
From DS low to DTA low:
From DS high to DTA high
Registers
Memory
discharge C
A delay of 500 µs to 2 ms (see Section 17.2 on page 48) must be applied before the first microprocessor access is
performed after the RESET pin is set high.
High impedance is measured by pulling to the appropriate rail with R
Characteristics
L
.
Figure 26 - Motorola Non-Multiplexed Bus Timing - Read Access
†
t
t
CSD
DSD
- Motorola Non-Multiplexed Bus Mode - Read Access
Sym
t
t
t
t
t
t
t
t
t
Zarlink Semiconductor Inc.
RWS
RWH
t
CSD
DSD
CSS
CSH
t
t
AKD
AKH
t
AKZ
DH
AH
DS
t
AS
t
AS
CSS
t
RWS
ZL50018
Min.
108
15
15
10
0
5
0
0
0
8
7
4
Typ.
VALID ADDRESS
t
AKD
L
, with timing corrected to cancel time taken to
t
DS
Max.
185
75
12
VALID READ DATA
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
DH
t
t
RWH
t
AH
C
C
(Note 1)
C
C
C
(Note 1)
CSH
L
L
L
L
L
t
=50pF, R
AKH
Test Conditions
= 50 pF
= 50 pF
= 50 pF
= 50 pF, R
t
AKZ
Data Sheet
L
=1 K
V
V
V
L
V
V
V
CT
CT
CT
CT
= 1 K
CT
CT
2