ZL30402/QCC ZARLINK [Zarlink Semiconductor Inc], ZL30402/QCC Datasheet - Page 27
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ZL30402/QCC
Manufacturer Part Number
ZL30402/QCC
Description
SONET/SDH Network Element PLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL30402QCC.pdf
(41 pages)
5.1.3
The NORMAL to AUTO-HOLDOVER to HOLDOVER to NORMAL sequence represents the most likely operation of
ZL30402 in Network Equipment.
The sequence starts from the Normal state and transitions to Auto Holdover state due to an unforeseen loss of
reference. The failure conditions triggering this transition were described in section 4.1.2. When in the Auto
Holdover state, the ZL30402 can return to Normal mode automatically if the lost reference is restored and the
ADHR bit is set to 0. If the reference clock failure persists for a period of time that exceeds the system design limit,
the system control processor may initiate a reference switch. If the secondary reference is available the ZL30402
will briefly switch into Holdover mode and then transition to Normal mode.
The new reference clock will most likely have a different phase but it may also have a different fractional frequency
offset. In order to lock to a new reference with a different frequency, the Core PLL may be stepped gradually
towards the new frequency. The frequency slope will be limited to less than 2.0 ppm/sec.
RESET
Dual Reference Operation:
Figure 9 - Entry into Auto Holdover state and recovery into Normal mode by switching
RESET == 1
unconditional return from
MS2, MS1 == 10 forces
any state to Free-run
FREE-
RUN
10
MS2, MS1! = 10
MS2, MS1 == 01 OR
RefSel change
NORMAL --> AUTO HOLDOVER--> HOLDOVER --> NORMAL
HOLD-
OVER
01
Zarlink Semiconductor Inc.
MS2, MS1 == 00
ZL30402
Ref: OK &
{AUTO}
references
27
RefSel Change
(LOCKED)
NORMAL
00
Ref: OK --> FAIL &
MS2, MS1 == 00
{AUTO}
(automatic return enabled)
HOLD-
OVER
AUTO
AHRD=0
MHR= 0-->1 then 1-->0
MS2, MS1 == 00 &
MS2, MS1 == 00 &
Ref: FAIL --> OK &
AHRD=1 &
{MANUAL}
Ref: FAIL --> OK &
AHRD=0
{AUTO}
Data Sheet