AK4646EN AKM [Asahi Kasei Microsystems], AK4646EN Datasheet - Page 23

• Manufacturer Part Number: AK4646EN
• Description: Stereo CODEC with MIC/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

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A reference clock of PLL is selected among the input clocks to MCKI, BICK or LRCK pin. The required clock for the
AK4646 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits (Table 4).
a) PLL reference clock: MCKI pin
BICK and LRCK inputs should be synchronized with MCKO output. The phase between MCKO and LRCK dose not
matter. MCKO pin outputs the frequency selected by PS1-0 bits (Table 9) and the output is enabled by MCKO bit.
Sampling frequency can be selected by FS3-0 bits (Table 5).
MS0557-E-02
PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
Figure 13. PLL Slave Mode 1 (PLL Reference Clock: MCKI pin)
AK4646
MCKI
MCKO
BICK
LRCK
SDTO
SDTI
256fs/128fs/64fs/32fs
≥ 32fs
1fs
- 23 -
12MHz, 13.5MHz, 24MHz, 27MHz
MCLK
BCLK
LRCK
SDTI
SDTO
DSP or μP
[AK4646]
2007/05