CYIL1SM1300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM1300AA_09 Datasheet - Page 7

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CYIL1SM1300AA_09

Manufacturer Part Number
CYIL1SM1300AA_09
Description
LUPA-1300 1.3 MPxl High Speed CMOS Image Sensor
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
The photodiode is designed to obtain sensitivity as high as
possible for a dynamic range of at least 60dB. Consequently the
photodiode capacitance is 10 fF at the output, resulting in a S/N
of more than 60 dB as the rms noise level is within the expec-
tation of 45 noise electrons. The pixel was specially designed to
have a very low parasitic light sensitivity (<0.5%). The pixels are
based on the high-fill factor active pixel sensor technology of
FillFactory (US patent No. 6,225,670 and others).
Column Readout Amplifiers
The column readout amplifiers are the interface between the
pixels and the output amplifiers. The pixels in the array are
selected line by line and the pixels of the selected line are
connected to the column readout amplifiers, which bring the pixel
data in the correct format to the output amplifiers.
Output Amplifiers
16 output amplifiers each capable of working at 40 MHz pixel rate are placed equidistant on the bottom of the image sensor. These
output amplifiers are required to obtain a frame rate of 450 frames/sec. A single output stage, not only to reduce power, but also to
achieve the required pixel rate is designed.
Document Number: 38-05711 Rev. *D
In
Figure 5. Schematic Representation of Column Readout Structure
Module 2 : signal conditioning and multiplexing
Module 1 : track & hold or reference set method
Figure 6. Schematic Representation of Single Output Stage
power supply
Stabilize
Output stage
Figure 6
column
is a schematic representation of this module
Output stage
Vstable
To obtain a high frame rate, the complexity and the number of
stages in the column readout amplifiers must be minimized, so
that the power dissipation remains as low as possible, but also
to minimize the row blanking time.
sentation of the column readout structure. It consists of two parts.
The first part is a module that reduces the row blanking time. The
second part shifts the signal to the correct level for the output
amplifiers and allows multiplexing in the x-direction.
From the moment that a new row is selected, the pixel data of
that row is placed onto the columns of the pixel array. These
columns are long lines and have a large parasitic capacitance.
As the pixel is small, it is not possible to match the transistor
inside the pixel, which drives this column. Consequently, the first
module in the column readout amplifiers must solve the
mismatch between the pixel driver and the large column capac-
itance.
Out
Cload
10 pF
X-mux
Norow sel
Shkol
Figure 5
CYIL1SM1300AA
is a schematic repre-
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