CYIL1SM1300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM1300AA_09 Datasheet - Page 17

• Manufacturer Part Number: CYIL1SM1300AA_09
• Description: LUPA-1300 1.3 MPxl High Speed CMOS Image Sensor
• Manufacturer: CYPRESS [Cypress Semiconductor]

Standard Timing (ROT = 200 ns
In this case, the control signals Norowsel and pre_col are made
active for about 50 nsec from the moment the next line is
selected. The time these pulses have to be active is related with
the biasing resistance Pre_load. The lower this resistance, the
shorter the pulse duration of Norowsel and pre_col may be. After
these pulses are given, one has to wait for 180 nsec before the
first pixels can be sampled. For this mode Sh_col must be made
active low.
The SPI clock can have a frequency of 20 MHz and the data is loaded into the register at the rising edge. The load_addr pulse should
go high together or after the last falling edge of the SPI_clock (see
The Y-address has to be applied first and the X-address last. With respect to the timing in
significant bit of the Y-address (Y0) and A16 corresponds with the most significant bit of the X-address (X5). The Y-address is a 10
bit and the X-address is a 6-bit address register.
Document Number: 38-05711 Rev. *D
Load_address
Address_in
Clock_spi
Figure 17. Only pre_col and Norowsel Control Signals are Required. SH_col is made active low.
Unity C ell
D
D
C
C
To address registers
Q
Q
Address_out
Address
Clock_spi
Figure 18. Schematic of SPI
Clock_spi
Load_addr
address
Load_addr
Figure
Timing of Serial Parallel Interface (SPI)
The serial parallel interface is used to upload the x- and
y-address into the x- and y-address registers. This address is the
starting point of the window of interest and is uploaded in the shift
register by means of the corresponding synchronization pulse.
The elementary unit cell of the serial to parallel interface is shown
in
a common Load_addr and Clock_spi form the entire uploadable
address block. The uploaded addresses are applied to the
sensor on the rising edge of signal Load_addr.
A1
Figure
16 outputs to sensor : 6 x-address
bits and 10 y-address bits
E ntire uploadable addres s block
18).
A2
18. 16 of these cells are connected in parallel, having
A3
Figure
18, A1 corresponds with the least
A16
CYIL1SM1300AA
command
applied to
sensor
Page 17 of 29
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