CYIL1SM1300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM1300AA_09 Datasheet - Page 6

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CYIL1SM1300AA_09

Manufacturer Part Number
CYIL1SM1300AA_09
Description
LUPA-1300 1.3 MPxl High Speed CMOS Image Sensor
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Figure 3
on which the different modules are displayed.
The image core is a pixel array of 1280 * 1024 pixels each of 14
*14 μm2 in size. The readout is from bottom left to top right. To
obtain a frame rate of 450 frames/sec for this resolution, 16
output amplifiers each capable of driving an output capacitance
of 10 pF at 40 MHz are placed on the image sensor.
The column readout amplifiers bring the pixel data to the output
amplifiers. The logic and the x- and y addressing controls the
image sensor so that progressive scan and windowing is
possible. Extra pixel array drivers are foreseen at the top of the
image sensor to control the global pixel array signals.
Pixel Architecture
The active pixels allow synchronous shutter, i.e., all pixels are
illuminated during the same integration time, starting from the
same moment in time. After a certain integration time, the pixels
are readout sequentially. Readout and integration are in parallel,
which means that when the image sensor is readout, the
integration time for the next frame is ongoing. This feature
requires a memory element inside the pixel, which affects the
maximum fill factor. A schematic representation of the pixel is
given in
Document Number: 38-05711 Rev. *D
Note
6. The signals mentioned in
Figure
shows a schematic representation of the image sensor
4.
Figure 4
Y-addressing
are the internal signals generated by the internal drivers required to have the synchronous shutter feature.
Drivers for the pixel array signals
Figure 3. Architecture of the LUPA Sensor
Pixel
Column amplifiers
X-addressing
Analog multiplexer
Pixel core
Imager core
Figure 4. Schematic Representation of Synchronous Pixel
as used in LUPA Design
amplifiers
Output
16
15
14
3
2
1
reset
Vpix
Sensor
precharge
Control signals
System clock
40 MHz
SPI interface
sample
Mem
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