LXT972 Level One, LXT972 Datasheet - Page 48

• Manufacturer Part Number: LXT972
• Description: 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
• Manufacturer: Level One

LXT972 3.3V Dual-Speed Fast Ethernet Transceiver
The LXT972 register set includes multiple 16-bit registers.
Refer to
Table 35: Register Set
48
• Base registers (0 through 8) are defined in accordance
Address
with the “Reconciliation Sublayer and Media
Independent Interface” and “Physical Layer Link
Signaling for 10/100 Mbps Auto-Negotiation”
sections of the IEEE 802.3 standard.
21- 29
10
15
16
17
18
19
20
30
0
1
2
3
4
5
6
7
8
9
Table 35
Control Register
Status Register #1
PHY Identification Register 1
PHY Identification Register 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Base Page Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page Transmit Register
Auto-Negotiation Link Partner Received Next Page Register
1000BASE-T/100BASE-T2 Control Register
1000BASE-T/100BASE-T2 Status Register
Extended Status Register
Port Configuration Register
Status Register #2
Interrupt Enable Register
Interrupt Status Register
LED Configuration Register
Reserved
Transmit Control Register
for a complete register listing.
REGISTER DEFINITIONS
Register Name
• Additional registers are defined in accordance with
the IEEE 802.3 standard for adding unique chip
functions.
Refer to
Refer to
Refer to
Refer to
Refer to
Not Implemented
Not Implemented
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Not Implemented
Refer to
Bit Assignments
Table 37 on page 51
Table 38 on page 52
Table 39 on page 53
Table 40 on page 53
Table 41 on page 54
Table 42 on page 55
Table 43 on page 56
Table 44 on page 57
Table 45 on page 57
Table 46 on page 58
Table 47 on page 59
Table 48 on page 60
Table 49 on page 61
Table 50 on page 62
Table 51 on page 64