LXT972 Level One, LXT972 Datasheet - Page 20

• Manufacturer Part Number: LXT972
• Description: 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
• Manufacturer: Level One

LXT972 3.3V Dual-Speed Fast Ethernet Transceiver
Figure 10: Link Down Clock Transition
Loopback
The LXT972 provides two loopback functions, operational
and test (see
Figure
Table 9: Carrier Sense, Loopback, and Collision Conditions
20
100 Mbps
10 Mbps
1. Test Loopback is enabled when 0.14 = 1
Operational Loopback
Test Loopback
Speed
Operational loopback is provided for 10 Mbps half-
duplex links when bit 16.8 = 0. Data transmitted by
the MAC (TXData) will be looped back on the receive
side of the MII (RXData). Operational loopback is not
provided for 100 Mbps links, full-duplex links, or
when 16.8 = 1.
A test loopback function is provided for diagnostic
testing of the LXT972. During test loopback, the
twisted-pair interface is disabled. Data transmitted by
the MAC is internally looped back by the LXT972 and
returned to the MAC.
11.
Table
Full-Duplex
Half-Duplex
Full-Duplex
Half-Duplex, 16.8 = 0
Half-Duplex, 16.8 = 1
Duplex Condition
RX_CLK
TX_CLK
9). Loopback paths are shown in
Any Clock
Transmit or Receive
Transmit or Receive
Transmit or Receive
Carrier Sense
Receive Only
Receive Only
Clock transition time will not exceed 2X the
nominal clock period: (10 Mbps = 2.5 MHz 100 Mbps = 25 MHz)
Link Down condition/Auto Negotiate Enabled
2.5MHz Clock
Figure 11: Loopback Paths
Loopback
Test loopback is available for both 100TX and 10T
operation. Test loopback is enabled by setting bits as
follows:
Test
• 0.14 = 1
• 0.8 = 1 (full-duplex)
• 0.12 = 0 (disable auto-negotiation).
LXT972
Yes
Yes
Yes
MII
No
No
1
Loopback
10T
Operational
Loopback
Digital
Block
Yes
No
No
No
No
Loopback
100X
Transmit and Receive
Transmit and Receive
Transmit and Receive
Analog
Block
Collision
None
None
TX Driver