LXT972 Level One, LXT972 Datasheet - Page 31

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LXT972

Manufacturer Part Number
LXT972
Description
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
Manufacturer
Level One
Datasheet

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Boundary Scan
(JTAG1149.1) Functions
LXT972 includes a IEEE 1149.1 boundary scan test port
for board level testing. All digital input, output, and input/
output pins are accessible. The BSDL file is available by
contacting your local sales office (see the back page) or by
accessing the Level One website (www.level1.com).
Boundary Scan Interface
This interface consists of five pins (TMS, TDI, TDO,
TRST, and TCK). It includes a state machine, data register
array, and instruction register. The TMS and TDI pins are
internally pulled up. TCK is internally pulled down. TDO
does not have an internal pull-up or pull-down.
The TAP controller is a 16 state machine driven by the
TCK
TEST_LOGIC_RESET state is entered. The state machine
is also reset when TMS and TDI are high for five TCK
periods.
Table 12: Supported JTAG Instructions
Table 13: Device ID Register
State Machine
EXTEST
IDCODE
SAMPLE
TRIBYP
SETBYP
BYPASS
1. The JEDEC IS is an 8-bit identifier. The MSB is for parity and is ignored. Level One’s JEDEC ID is FE (1111 1110) which becomes 111 1110
Version
31:28
0001
Name
and
TMS
Part ID (hex)
27:12
03CB
Code
0001
0010
pins.
0000
0011
0100
1111
Upon
External Test
ID Code Inspection
Sample Boundary
Force Float
Control Boundary to 1/0
Bypass Scan
Jedec Continuation Characters
reset
Description
the
11:8
1110
Instruction Register
After the state machine resets, the IDCODE instruction is
always invoked. The decode logic ensures the correct data
flow to the Data registers according to the current
instruction. Valid instructions are listed in
Boundary Scan Register (BSR)
Each Boundary Scan Register (BSR) cell has two stages. A
flip-flop and a latch are used for the serial shift stage and
the parallel output stage. There are four modes of operation
as listed in
Table 11: BSR Mode of Operation
Mode
1
2
3
4
Table
Test
Normal
Normal
Normal
Test
Normal
LXT972 Functional Description
11.
Mode
System Function
Description
JEDEC ID
111 1110
Capture
Update
Shift
7:1
ID REG
BSR
Bypass
BSR
Bypass
Bypass
Data Register
1
Table
Reserved
12.
0
1
31

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