M37754 Mitsubishi, M37754 Datasheet - Page 75

• Manufacturer Part Number: M37754
• Description: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

OUTPUT FUNCTION OF CHIP SELECT SIGNAL
Ports P9
cording to the contents of chip select control register and chip select
area register. Bits 0 to 3 of chip select control register select either
chip select output (or addresses A
Additionally, bits 0 to 2 of chip select area register select the area in-
tended for each chip select signal.
Figure 87 shows the bit configuration of chip select control register
and Figure 88 shows that of chip select area register. Figure 89
shows the chip select areas.
The bus cycle of CS
select control register. That selection is valid regardless of the bus
cycle select bits of processor mode register 1. Additionally, that bus
cycle selection of CS
with the CS
When accessing addresses in which the chip select area specified
by bits 0 to 2 of chip select area register and the internal memory
area overlap one another, chip select signals are not output. In this
case, its bus cycle is the cycle of internal memory area access.
It is possible to make the chip select output floating during Hold
state. That is realized by clearing the corresponding bit of port P9
direction register (address 15
output mode register (address 1A
start and termination is the same as that of addresses A
fer to section on processor mode.)
ADDRESS OUTPUT FUNCTION
Port P9
cording to bits 1 and 2 of chip select control register, and bits 6 and 7
of chip select area register.
About signal pairs of A
only one signal can be output. It is because chip select signals CS
to CS
A
It is possible to make the address output floating during Hold state.
That is realized by clearing the corresponding bit of port P9 direction
register (address 15
mode register (address 1A
termination is the same as that of addresses A
tion on processor mode.)
22
___
output.
3
output are common to ports P9
1
___
0
to P9
to P9
3
and CS
3
4
can output the high-order addresses (A
___
can output the chip select signals CS
___
___
3
4
3
16
and CS
function select bits.
and CS
20
) to “0” and bits 0 to 2 of waveform output
and CS
___
16
___
4
) to “000”. The timing of Hold start and
16
4
can be selected with bits 4 to 7 of chip
___
is valid when selecting port function
) to “0” and bits 0 to 2 of waveform
1
, A
20
16
21
) to “000”. The timing of Hold
to A
1
to P9
and CS
22
output) or port function.
___
3
0
and addresses A
to A
2
, and A
19
___
. (Refer to sec-
M37754M8C-XXXGP, M37754M8C-XXXHP
0
20
0
22
to A
to CS
to A
and CS
___
19
22
. (Re-
4
___
) ac-
20
___
ac-
to
3
1
,
Fig. 87 Chip select control register bit configuration
Notes 1 : At reset, bit 0 becomes “0” when the CNVss pin’s level is “L”;
M37754S4CGP, M37754S4CHP
7
6
2 : Bits 6 and 7 of chip select area register (address 63
5
bit 0 becomes “1” when the CNVss pin’s level is “H”.
whether the chip select signal or address is output.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
4
3
2
1
MITSUBISHI MICROCOMPUTERS
0
CS
CS
CS
CS
CS
b5 b4 In high-speed In low-speed
Chip select control register
CS
b7 b6 In high-speed In low-speed
0 0 : 5- access
0 1 : 4- access
1 0 : 3- access
1 1 : Do not select. 2- access
0 0 : 5- access
0 1 : 4- access
1 0 : 3- access
1 1 : Do not select. 2- access
0
1
3
4
3
4
0 : Port P9
1 : CS
0 : Port P9
1 : CS
0 : Port P9
1 : CS
0 : Port P9
1 : CS
, CS
function select bit (Note 2)
bus cycle select bits
bus cycle select bits
function select bit (Note 1)
function select bit
2
function select bit (Note 2)
0
1,
3
4
output
output or A
output
CS
0
1
3
4
, P9
2
function
function
function
output or A
2
function
Do not select.
4- access
3- access
Do not select.
4- access
3- access
22
output
Address
16
20
62
) specify
, A
16
21
output
75