M37754 Mitsubishi, M37754 Datasheet - Page 40
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M37754
Manufacturer Part Number
M37754
Description
SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
Manufacturer
Mitsubishi
Datasheet
1.M37754.pdf
(114 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M37754S4CGP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Three-phase mode 1
In selecting three-phase waveform mode, three-phase mode 1 is
selected by setting bit 4 of the waveform output mode register (ad-
dress 1A
In this mode, each of timers A0 to A2 can have two timer registers
and the contents of those registers are alternately reloaded into the
counter each time the counter of timer B2 becomes 0000
write operation to two timer registers, when rewriting to each timer
register of timers A0, A1 and A2 after writing to each timer register of
them, the data is written each to timers A0
ing to each timer register, the timer A write register (in Figure 46) in-
dicates the timer to be intended for write.
The interrupt request normally occurs when the counter of timer B2
becomes 0000
between “every second time” and “every fourth time.” Bit 0 of the
pulse output data register 1 (address 1C
Additionally, “0” or “1” of the three-phase output polarity set buffer
can be used as the occurrence factor of timer B2 interrupt request.
Bit 1 of the pulse output data register 1 (address 1C
When the timer B2’s counter contents become 0000
of three-phase output polarity set buffer are set into the output polar-
ity set toggle flip-flop on which .the output polarity of three-phase
waveform depends. The contents of three-phase output polarity set
buffer are reversed after that operation.
The polarity of the contents of output polarity set toggle flip-flop is re-
versed each time completion of one-shot pulse of timer (timers A2 to
A0) corresponding to each phase.
Figure 47 shows an example of U-phase waveform and the output
operation is explained.
Write “0” to the three-phase output polarity set buffer (bit 3 at ad-
dress 1A
dress 1C
every second time. Additionally, clear the interrupt validity output se-
lect bit (bit 1 at address 1C
may occur at “0” of the three-phase output polarity set buffer.
Fig. 47 U-phase waveform output example in three-phase mode 1 (triangular wave modulation)
40
16
16
16
) to “1”.
) to “0” so that the timer B2 interrupt request may occur at
). Clear the interrupt request interval set bit (bit 0 at ad-
Timer B2 interrupt request
signal
Signal output each time
Timer B2 becomes 0000
One-shot pulse output with
timer A2
Timer A2
Timer A2
Contents of output polarity
set toggle flip-flop 2
Reversed
signal with dead-time timer
U-phase waveform output
U-phase waveform output
16
. However, this occurrence interval can be switched
1
pulse
16
) so that the timer B2 interrupt request
output
16
16
1
n1
n2
n1
, A1
) selects that.
1
and A2
16
16
M37754M8C-XXXGP, M37754M8C-XXXHP
) selects that.
, the contents
1
. When writ-
n2
n3
n4
16
. About
n3
After the procedure above, three-phase mode 1 starts operation
when actuating the timer B2.
When the counter of timer B2 becomes 0000
rupt request occurs and timer A2 simultaneously starts one-shot
pulse output. At this time, the contents of three-phase output polarity
set buffer, “0” in this case, are set into the output polarity set toggle
flip-flop 2. The contents of three-phase output polarity set buffer are
reversed from “0” to “1” after that operation.
When the timer A2 counter counts the value written into the timer A2
and the one-shot pulse output of timer A2 is completed, the contents
of output polarity set toggle flip-flop 2 are reversed from “0” to “1”. Si-
multaneously, the one-shot pulse of the 8-bit dead-time timer is out-
put for ensuring time, so that “L” levels of U- and U-phase waveforms
do not overlap.
Fig. 46 Timer A write flag bit configuration
Note : Only when bit 5 of the particular function select register 1 (in Fig. 15)
M37754S4CGP, M37754S4CHP
7
6
is set to “1”, this register’s contents can be changed from the status
after reset (in Fig.76).
5
n4
n5
n6
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
4
3
2
1
MITSUBISHI MICROCOMPUTERS
0
n5
Timer A write register 45
Timer A0 write bit
0 : Write to timer A0
1 : Write to timer A0
Timer A1 write bit
0 : Write to timer A1
1 : Write to timer A1
Timer A2 write bit
0 : Write to timer A2
1 : Write to timer A2
n6
n7
n8
1
1
1
16
Address
__
, the timer B2 inter-
16