M37754 Mitsubishi, M37754 Datasheet - Page 50

• Manufacturer Part Number: M37754
• Description: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

Fig. 61 External connection example in plural output of transmit
Fig. 62 Other registers except special function select register 1 bit
Table 6. Output pin of transmit clock select bits and pins’ function
Note: It outputs “H” when bit 2 of the port P8 direction register is “1”, and it
50
Note: This is available in clock synchronous serial I/O, using internal clock
Output pin of trans-
mit clock select bits
7
0
7
7
7
0
TC
6
6
6
6
0
0
1
1
becomes floating when bit 2 is “0”.
UART0
and transmission mode.
1
5
5
5
5
configuration in plural output of transmit clock mode
clock mode
4
4
1
4
4
3
0
3
3
3
TC
0
1
0
1
2
0
2
2
0
2
0
T
CLKS
CLKS
CLK
1
0
1
1
1
X
D
0
0
1
0
0
0
0
P8
1
0
CLK
CLK
1
UART0 Transmit/Receive mode register
0 0 1 : Clock synchronous
0
This bit must be “0”
UART0 Transmit/Receive control register 0
1
UART0 Transmit/Receive control register 1
0
A-D control register 1
0
“H”
“H”
/CLK
D
CLK
0
0
IN
: Internal clock
: Disable CTS, RTS
: Disable receive
: Disable D-A output
0
“H” (Note)
“H” (Note)
P8
CLKS
R
2
/R
X
D
Pin name
X
0
D
2
D
CLK
0
Address
IN
1F
P8
P8
16
0
0
/CTS
/CTS
____
____
CLKS
M37754M8C-XXXGP, M37754M8C-XXXHP
P8
P8
0
0
/RTS
/RTS
____
____
D
CLK
0
0
IN
Address
1
Address
Address
30
34
35
0
0
/DA
/DA
16
16
16
0
0
Receive
Receive starts when bit 2 (REk flag) of UARTk Transmit/Receive
control register 1 is set to “1”.
The RTSk output is “H” when the REk flag is “0” and goes “L” when
the REk flag changed to “1” and the TIk flag did to “0”. It goes back to
“H” when receive starts. The TIk flag is cleared to “0” by write dummy
data to the transmit buffer register. It is ready to receive when RTSk
output is “L”.
The data from the RxDk pin is retrieved and the contents of the re-
ceive register is shifted by 1 bit each time when the transmission
clock CLKj changes from “L” to “H.” When an 8-bit data is received,
the contents of the receive register is transferred to the receive buffer
register and bit 3 (RIk flag) of UARTk Transmit/Receive control reg-
ister 1 is set to “1”. In other words, the setting “1” to the RIk flag indi-
cates that the receive buffer register contains the received data.
When the RIk flag changes from “0” to “1”, the interrupt request bit in
the UARTk receive interrupt control register is set to “1”. Bit 4 (OERk
flag) of UARTk Transmit/Receive control register 1 is set to “1” when
the next data is transferred from the receive register to the receive
buffer register while RIk flag is “1”, and indicates that the next data
was transferred to the receive register before the contents of the re-
ceive buffer register was read. RIk flag is automatically cleared to “0”
when the low-order byte of the receive buffer register is read or when
the REk flag is cleared to “0”. The OERk flag is cleared when the REk
flag is cleared or port P8 is set to a parallel port. Bit 5 (FERk flag), bit
6 (PERk flag), and bit 7 (SUMk flag) are ignored in clock synchro-
nous mode.
When reading the contents of the receive buffer register, the received
data is pulled from the least significant bit (LSB) in the received order
if bit 7 (TEM) of the UARTj Transmit/Receive control registers 0 is “0”.
If bit 7 (TEM) is “1”, the received data is pulled from the most signifi-
cant bit (MSB).
As shown in Figure 54, with clock synchronous serial communica-
tion, data cannot be received unless the transmitter is operating be-
cause the receive clock is created from the transmission clock.
Therefore, the transmitter must be operating even when there is no
need to sent data from UARTk to UARTj.
M37754S4CGP, M37754S4CHP
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
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