M37754 Mitsubishi, M37754 Datasheet - Page 48

• Manufacturer Part Number: M37754
• Description: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

CLOCK SYNCHRONOUS SERIAL COMMUNI-
CATION
A case where communication is performed between two clock syn-
chronous serial I/O ports as shown in Figure 59 will be described.
(The transmission side will be denoted by subscript j and the receiv-
ing side will be denoted by subscript k.)
Bit 0 of the UARTj Transmit/Receive mode register and UARTk
Transmit/Receive mode register must be set to “1” and bits 1 and 2
must be “0”. The length of the transmission data is fixed at 8 bits.
Bit 3 of the UARTj Transmit/Receive mode register of the clock send-
ing side is cleared to “0” to select the internal clock. Bit 3 of the
UARTk Transmit/Receive mode register of the clock receiving side is
set to “1” to select the external clock. Bits 4, 5 and 6 are ignored in
clock synchronous mode. Bit 7 must always be “0”.
The clock source is selected by bit 0 (TCS
clock-sending-side UARTj Transmit/Receive control register 0. As
shown in Figure 54, the selected clock is divided by (n+1), then by 2,
is passed through a transmission control circuit, and is output as
Fig. 59 Clock synchronous serial communication
48
MSB/
SUM
LSB
0
UARTj Transmit/Receive mode register
PER
UARTj Transmit/Receive control
UARTj Transmit/Receive control
UARTj transmit buffer register
UARTj receive buffer register
UARTj transmit register
FER
UARTj receive register
OER
register 0
register 1
T
EPTY
X
RI
0
RE
0
0
TCS
0
) and bit 1 (TCS
TI
0
1
TCS
TE
1
0
M37754M8C-XXXGP, M37754M8C-XXXHP
TxDj
RxDj
CLKj
CTSj
1
) of the
____
____
_____
transmission clock CLKj. Therefore, when the selected clock is Pfi,
On the clock receiving side, the TCS
Transmit/Receive control register 0 are ignored because an external
clock is selected.
Bit 2 of the clock-sending-side UARTj Transmit/Receive control reg-
ister 0 is cleared to “0” to select CTSj input. Bit 2 of the clock receiv-
ing side is set to “1” to select RTSk output.
Bit 4 of the UART Transmit/Receive control register 0 is used to de-
termine whether to use CTS or RTS signal. Bit 4 must be “0” when
CTS or RTS signal is used. Bit 4 must be “1” when CTS and RTS sig-
nals are not used. When CTS and RTS signals are not used, CTS/
RTS pin can be used as a normal port. The case using CTS and RTS
signals are explained below. However, when CTS and RTS signals
are not used, there are no condition of CTSj input, and there is no
RTSk output.
M37754S4CGP, M37754S4CHP
RTSk
RxDk
CLKk
TxDk
____
Bit Rate = Pf
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MSB/
SUM
LSB
0
UARTk Transmit/Receive mode register
PER
i
/ {(n+1) 2}
UARTk Transmit/Receive control
UARTk Transmit/Receive control
UARTk transmit buffer register
MITSUBISHI MICROCOMPUTERS
UARTk receive buffer register
____
____
UARTk transmit register
FER
UARTk receive register
____
OER
____
____
register 0
register 1
____
T
EPTY
0
X
RI
1
and TCS
____
RE
0
1
____
1
TI
0
____
bits of the UARTk
____
TE
1
____
____
____
____