T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 91

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

CANSTCH (S:B2h)
CAN message object Status Register
NOTE:
See Figure 59.
No default value after reset.
Rev.A - May 17, 2001
Bit Number Bit Mnemonic
DLCW
7
7
6
5
4
3
2
1
0
TXOK
DLCW
RXOK
TXOK
AERR
BERR
SERR
CERR
FERR
6
Data length code warning
Transmit OK
Receive OK
Bit error (only in transmission)
Stuff error
CRC error
Form error
Acknowledgment error
RXOK
The incoming message does not have the DLC expected. Whatever the frame type, the DLC field of
the CANCONCH register is updated by the received DLC.
The communication enabled by transmission is completed.
When the controller is ready to send a frame, if two or more message objects are enabled as producers,
the lower index message object (0 to 13) is supplied first.
This flag can generate an interrupt.
The communication enabled by reception is completed.
In the case of two or more message object reception hits, the lower index message object (0 to 13)
is updated first.
This flag can generate an interrupt.
The bit value monitored is different from the bit value sent.
Exceptions:
the monitored recessive bit sent as a dominant bit during the arbitration field and the acknowledge
slot detecting a dominant bit during the sending of an error frame.
This flag can generate an interrupt.
Detection of more than five consecutive bits with the same polarity.
This flag can generate an interrupt.
The receiver performs a CRC check on each destuffed received message from the start of frame up
to the data field.
If this checking does not match with the destuffed CRC field, a CRC error is set.
This flag can generate an interrupt.
The form error results from one or more violations of the fixed form in the following bit fields:
CRC delimiter
acknowledgment delimiter
end_of_frame
This flag can generate an interrupt.
No detection of the dominant bit in the acknowledge slot.
This flag can generate an interrupt.
5
Figure 79. CANSTCH Register
Preliminary
BERR
4
SERR
3
Description
CERR
2
T89C51CC02
FERR
1
AERR
0
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