T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 83

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T89C51CC02

Manufacturer Part Number
T89C51CC02
Description
8-Bit MCU
Manufacturer
Atmel
Datasheet

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CANGIT (S:9Bh)
CAN General Interrupt
Reset Value: 0x00 0000b
Rev.A - May 17, 2001
Bit Number Bit Mnemonic
CANIT
7
7
6
5
4
3
2
1
0
OVRBUF
OVRTIM
CANIT
CERG
AERG
SERG
FERG
6
-
-
General interrupt flag (1)
Reserved
Overrun CAN Timer
Overrun BUFFER
Stuff error General
CRC errorGeneral
Form error General
Acknowledgment error General
OVRTIM
This status bit is the image of all the CAN controller interrupts sent to the interrupt controller.
It can be used in the case of the polling method.
The values read from this bit isindeterminate. Do not set this bit.
This status bit is set when the CAN timer switches 0xFFFF to 0x0000.
If the ENOVRTIM bit in the IE1 register is set, an interrupt is generated.
The user clears this bit in order to reset the interrupt.
0 - no interrupt.
1 - IT turned on
This bit is set when the buffer is full.
Bit resettable by user.
see Figure 59.
Detection of more than five consecutive bits with the same polarity.
This flag can generate an interrupt.
The receiver performs a CRC check on each destuffed received message from the start of frame up
to the data field.
If this checking does not match with the destuffed CRC field, a CRC error is set.
This flag can generate an interrupt.
The form error results from one or more violations of the fixed form in the following bit fields:
CRC delimiter
acknowledgment delimiter
end_of_frame
This flag can generate an interrupt.
No detection of the dominant bit in the acknowledge slot.
This flag can generate an interrupt.
5
Figure 67. CANGIT Register
Preliminary
OVRBUF
4
SERG
3
Description
CERG
2
T89C51CC02
FERG
1
AERG
0
83

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