T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 81

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

15.12. Registers
CANGCON (S:ABh)
CAN General Control Register
Reset Value: 0000 0x00b
Rev.A - May 17, 2001
Bit Number Bit Mnemonic
ABRQ
7
7
6
5
4
3
2
1
0
AUTOBAUD
SYNCTTC
ENA/STB
OVRQ
OVRQ
ABRQ
GRES
TEST
TTC
6
Abort request
Overload frame request (initiator).
Network in Timer Trigger communication
Synchronization of TTC
AUTOBAUD
Test mode. The test mode is intended for factory testing and not for customer use.
Enable/Standby CAN controller
General reset (software reset).
Not an auto-resettable bit. A reset of the ENCH bit (message object control & DLC register) is done
for each message object. The pending communications are immediately disabled and the on-going
communication will be terminated normally, setting the appropriate status flags, TXOK or RXOK.
Auto-resettable bit.
Set to send an overload frame after the next received message.
Cleared by the hardware at the beginning of transmission of the overload frame.
0 - no TTC.
1 - node in TTC.
When this bit is set to "1" the TTC timer is caught on the last bit of the End Of Frame.
When this bit is set to "0" the TTC timer is caught on the Start Of Frame.
This bit is only used in the TTC mode.
0 - no autobaud
1 - autobaud mode.
When this bit is set to “1’, it enables the CAN controller and its input clock.
When this bit is set to “0”, the on-going communication is terminated normally and the CAN controller
state of the machine is frozen (the ENCH bit of each message object does not change).
In the standby mode, the transmitter constantly provides a recessive level; the receiver is not activated
and the input clock is stopped in the CAN controller. During the disable mode, the registers and the
mailbox remain accessible.
Note that two clock periods are needed to start the CAN controller state of the machine.
Auto-resettable bit. This reset command is ’ORed’ with the hardware reset in order to reset the
controller. After a reset, the controller is disabled.
TTC
5
Figure 65. CANGCON Register
SYNCTTC
Preliminary
4
AUTOBAUD
3
Description
TEST
2
T89C51CC02
ENA
1
GRES
0
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