T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 46

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

T89C51CC02
The software may examine the FE bit after each reception to check for data errors. Once set, only software or a
reset clears the FE bit. Subsequently received frames with valid stop bits cannot clear the FE bit. When the FE
feature is enabled, RI rises on the stop bit instead of the last data bit (See Figure 27. and Figure 28.).
11.2. Automatic Address Recognition
The automatic address recognition feature is enabled when the multiprocessor communication feature is enabled
(SM2 bit in SCON register is set).
Implemented in the hardware, automatic address recognition enhances the multiprocessor communication feature
by allowing the serial port to examine the address of each incoming command frame. Only when the serial port
recognizes its own address will the receiver set the RI bit in the SCON register to generate an interrupt. This
ensures that the CPU is not interrupted by command frames addressed to other devices.
If necessary, you can enable the automatic address recognition feature in mode 1. In this configuration, the stop
bit takes the place of the ninth data bit. Bit RI is set only when the received command frame address matches the
device’s address and is terminated by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and a broadcast address.
NOTE: The multiprocessor communication and automatic address recognition features cannot be enabled in mode 0 (i.e. setting SM2 bit in SCON
register in mode 0 has no effect).
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SMOD0=0
SMOD0=1
SMOD0=1
SMOD0=X
SMOD0=1
RXD
RXD
FE
RI
RI
FE
RI
Figure 28. UART Timing in Modes 2 and 3
Start
Start
bit
bit
Figure 27. UART Timing in Mode 1
D0
D0
Preliminary
D1
D1
D2
D2
D3
D3
Data byte
Data byte
D4
D4
D5
D5
D6
D6
D7
D7
Ninth
Stop
D8
bit
bit
Stop
Rev.A - May 17, 2001
bit