SB82371 Intel Corporation, SB82371 Datasheet - Page 50

• Manufacturer Part Number: SB82371
• Description: 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR
• Manufacturer: Intel Corporation

82371FB (PIIX) AND 82371SB (PIIX3)
2.3.8.
Address Offset:
Default Value:
Attribute:
The HEDT Register identifies the PIIX/PIIX3 as a multi-function device.
2.3.9.
Address Offset:
Default Value:
Attribute:
This register selects the base address of a 16 byte I/O space to provide a software interface to the Bus
Master functions. Only 12 bytes are actually used (6 bytes for primary and 6 bytes for secondary).
50
7:4
3:0
7:0
31:16
15:4
3:2
1
0
Bit
Bit
Bit
HEDT—HEADER TYPE REGISTER (Function 1)
BMIBA—BUS MASTER INTERFACE BASE ADDRESS REGISTER (Function 1)
Master Latency Timer Count Value. PIIX-initiated PCI burst cycles can last indefinitely, as
long as PHLDA# remains active. However, if PHLDA# is negated after the burst cycle is
initiated, PIIX/PIIX3 limits the burst cycle to the number of PCI Bus clocks specified by this
field.
Reserved
Device Type (DEVICET). 00. Multi-function device capability for PIIX/PIIX3 is defined by the
HEDT register in Function 0.
Reserved. Hardwired to 0.
Bus Master Interface Base Address. These bits provide the base address for the Bus
Master interface registers and correspond to AD[15:4].
Reserved. Hardwired to 0.
Reserved.
Resource Type Indicator (RTE)—RO. This bit is hardwired to 1 indicating that the base
address field in this register maps to I/O space.
0Eh
00h
Read Only
20–23h
00000001h
Read/Write
Description
Description
Description