SB82371 Intel Corporation, SB82371 Datasheet - Page 47

• Manufacturer Part Number: SB82371
• Description: 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR
• Manufacturer: Intel Corporation

2.2.24.
Address Offset:
Default Value:
Attribute:
The value in this register defines the duration of the STPCLK# negated period when bit 2 in the SMICNTL
Register is set to 1. The value in this register is loaded into the STPCLK# Timer when STPCLK# is negated.
The STPCLK# timer is a divide by PCI clock. The base count for a value of 0 is 42 sec for a 50 MHz time
base, 35 sec for a 60 MHz time base, 32 sec for a 66 MHz time base. These numbers are determined as
follows: # of PCI clocks STPCLK# is asserted (or negated) = 1 + 1056 X (programmed value in register +1).
2.3.
The PIIX/PIIX3 are multi-function devices, as indicated by bit 7 of the Header Type Register. The PCI IDE
interface function uses Function 1.
2.3.1.
Address Offset:
Default Value:
Attribute:
The VID Register contains the vendor identification number. This register, along with the Device Identification
Register, uniquely identify any PCI device. Writes to this register have no effect.
2.3.2.
Address Offset:
Default Value:
Attribute:
The DID Register contains the device identification number. This register, along with the VID Register, define
the PIIX. Writes to this register have no effect.
15:0
15:0
7:0
Bit
Bit
Bit
PCI Configuration Registers—IDE Interface (Function 1)
CTHTMR—CLOCK SCALE STPCLK# HIGH TIMER (Function 0)
VID—Vendor Identification Register (Function 1)
DID—DEVICE IDENTIFICATION REGISTER (Function 1)
Vendor Identification Number. This is a 16-bit value assigned to Intel
Device Identification Number. This is a 16-bit value assigned to the PIIX.
Clock Scaling STPCLK# High Timer Value. Bits [7:0] define the duration of the STPCLK#
negated period during clock throttling.
AEh
00h
Read/Write
00–01h
8086h
Read Only
02–03h
1230h (PIIX)
7010h (PIIX3)
Read Only
Description
Description
Description
82371FB (PIIX) AND 82371SB (PIIX3)
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