XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 82

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XC68HC08KH12

Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
System Integration Module (SIM)
Advance Information
82
INT/BREAK
CGMXCLK
IAB
NOTE:
Figure 7-19. Stop Mode Recovery from Interrupt or Break
A break interrupt during stop mode sets the SIM break stop/wait bit
(SBSW) in the break status register (BSR).
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
To minimize stop current, all pins configured as inputs should be driven
to a logic 1 or logic 0.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
STOP +1
R/W
IAB
IDB
instruction.
System Integration Module (SIM)
STOP ADDR
Figure 7-18. Stop Mode Entry Timing
Figure 7-18
PREVIOUS DATA
STOP + 2
STOP RECOVERY PERIOD
STOP ADDR + 1
STOP + 2
shows stop mode entry timing.
NEXT OPCODE
SP
SAME
SP – 1
MC68HC(7)08KH12
SAME
SP – 2
SAME
MOTOROLA
SP – 3
SAME
Rev. 1.0

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