XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 62
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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System Integration Module (SIM)
7.2 Introduction
Advance Information
62
7.7
7.7.1
7.7.2
7.8
7.8.1
7.8.2
7.8.3
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. A block diagram of the SIM is
shown in
The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
•
•
•
•
•
Bus clock generation and control for CPU and peripherals
– top/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure
System Integration Module (SIM)
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Break Status Register (BSR). . . . . . . . . . . . . . . . . . . . . . . . 83
Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . . 84
Break Flag Control Register (BFCR). . . . . . . . . . . . . . . . . . 85
7-1.
Figure 7-2
is a summary of the SIM I/O registers.
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
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