XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 143

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XC68HC08KH12

Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
9.5.5 USB Embedded Device Control Register 1 (DCR1)
MC68HC(7)08KH12
MOTOROLA
Rev. 1.0
Address:
TP0SIZ3-TP0SIZ0 — Embedded Device Endpoint 0 Transmit Data
Packet Size
T1SEQ — Embedded Device Endpoint 1/2 Transmit Sequence Bit
ENDADD — Endpoint Address Select
Reset:
Figure 9-16. USB Embedded Device Control Register 1 (DCR1)
Read:
Write:
These read/write bits store the number of transmit data bytes for the
next IN token request for embedded device Endpoint 0. These bits
are cleared by reset.
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed to
embedded device Endpoint 1 or 2. Toggling of this bit must be
controlled by software. Reset clears this bit.
This read/write bit specifies whether the data inside the registers
DE1D0-DE1D7 are used for embedded device Endpoint 1 or 2. If all
the conditions for a successful Endpoint 2 USB response to a host’s
IN token are satisfied (TXD1F=0, TX1E=1, DSTALL2=0, and
ENABLE2=1) except that the ENDADD bit is configured for
Endpoint 1, the USB responds with a NAK handshake packet. Reset
clears this bit.
1 = DATA1 Token active for next embedded device Endpoint 1/2
0 = DATA0 Token active for next embedded device Endpoint 1/2
T1SEQ
$004C
Bit 7
Universal Serial Bus Module (USB)
transmit
transmit
0
ENDADD
= Unimplemented
6
0
I/O Register Description of the Embedded Device Function
TX1E
5
0
4
0
0
TP1SIZ3
Universal Serial Bus Module (USB)
3
0
TP1SIZ2
2
0
Advance Information
TP1SIZ1
1
0
TP1SIZ0
Bit 0
0
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