XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 50

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XC68HC08KH12

Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
Configuration Register (CONFIG)
Advance Information
50
NOTE:
NOTE:
Address:
The CONFIG register is a special register containing one-time writable
latches after each reset. Upon a reset, the CONFIG register defaults to
the predetermined settings as shown in
SSREC — Short stop recovery bit
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal, do not set the SSREC bit.
COPRS — COP reset period selection bit
STOP — STOP instruction enable bit
COPD — COP disable bit
Reset:
Read:
Write:
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096 CGMXCLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module.
Operating Properly
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = COP reset cycle is (2
0 = COP reset cycle is (2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
$001F
Bit 7
0
0
Configuration Register (CONFIG)
Figure 5-1. Configuration Register (CONFIG)
= Unimplemented
6
0
0
(COP).
5
0
0
13
18
–2
–2
4
0
0
4
4
) CGMXCLK
) CGMXCLK
See Section 13. Computer
Figure 5-1
SSREC
3
0
MC68HC(7)08KH12
COPRS
2
0
.
STOP
1
0
MOTOROLA
Rev. 1.0
COPD
Bit 0
0

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