AT83C24 ATMEL Corporation, AT83C24 Datasheet - Page 25

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AT83C24

Manufacturer Part Number
AT83C24
Description
Smart Card Reader Interface with Power Management
Manufacturer
ATMEL Corporation
Datasheet

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Table 10. CONFIG4 (Config Byte 4)
4234E–SCR–09/04
Bit Number
7-5
X
7
4
3
2
1
0
Bit Mnemonic
POWERMON
INT_PULLUP
CRST_SEL
STEPREG
IT_SEL
X-X-X
6
X
Description
These bits should not be set.
Step Regulator mode
Clear this bit to enable the automatic step-up converter (CVCC is stable even if VCC is not higher than CVCC).
Set this bit to permanently disable the step-up converter (CVCC is stable only if VCC is sufficiently higher than
CVCC).
This bit must be set before activating the DC/DC converter if no external coil is present.
The reset value is 0.
This bit must always be set if no external coil is used
Internal pull-up
Set this bit to activate the internal pull-up (connected internally to EVCC) on PRES/INT pin.
Clear this bit to deactivate the internal pull-up.
PRES/INT is an open drain output with a programmable internal pull up.
The reset value is 0.
Power monitor
Set this bit to monitor any glitch on the Digital Supply Voltage (DVCC) of the AT83C24.
Clear this bit to monitor any glitch on VCC.
The reset value is 0.
Interrupt Select
Set this bit to disable INSERT and VCARD_INT interrupts. Then PRES/INT is pulled up when a card is present
and no error is detected.
Clear this bit to have all the interrupt sources enabled and active Low.
IT_SEL must be set to enable a hardware activation with CMDVCC.
The reset value is 0.
Card Reset Selection
Set this bit to have the CRST pin driven by hardware through the A1 pin (only with hardware activation).
Clear this bit to have the CRST pin driven by software through the CARDRST bit.
CRST_SEL must be set when CMDVCC is used (hardware activation).
The reset value is 0.
X
5
STEPREG
4
INT_PULLUP
3
POWERMON
2
IT_SEL
1
AT83C24
CRST_SEL
0
25

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