AT83C24 ATMEL Corporation, AT83C24 Datasheet - Page 16

• Manufacturer Part Number: AT83C24
• Description: Smart Card Reader Interface with Power Management
• Manufacturer: ATMEL Corporation

Software Activation (DC/DC Started by Writing in VCARD[1:0] bits) and ART bit = 0
16
AT83C24
ISO 7816 constraints: ta = 200 card clock cycles
Note:
The activation sequence is controlled by software using TWI commands, depending on
the cards to support. For ISO 7816 cards, the following sequence can be applied:
Figure 11. Software activation with ART bit = 1
1. Card Voltage is set by software to the required value (VCARD[1:0] bits in
2. Wait of the end of the DC/DC init with a polling on VCARDOK bit (STATUS
3. CKSTOP, IODIS are programmed by software. CKSTOP bit is reset to have
4. CRST pin is controlled by software using CARDRST bit (see INTERFACE
Timer[1-0] reset value is 400.
CONFIG0 register). This writing starts the DC/DC.
register) or wait for PRES/INT to go Low if enabled (if IT_SEL bit = 0 in
CONFIG4 register). When VCARDOK bit is set (by hardware), CARDIO bit
should be set by software.
the clock running. IODIS is reset to drive the I/O, C4, C8 pins and the
CIO,CC4, CC8 pins according to each other.
register).
CCLK
CVCC
1
CRST
CIO
2
400 card clock cycles< = tb
400 card clock cycles< = tc < = 40000 card clock cycles
ta
3
CARDRST bit set
tb
4
tc
4234E–SCR–09/04