AT83C24 ATMEL Corporation, AT83C24 Datasheet - Page 19
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AT83C24
Manufacturer Part Number
AT83C24
Description
Smart Card Reader Interface with Power Management
Manufacturer
ATMEL Corporation
Datasheet
1.AT83C24.pdf
(42 pages)
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Power Modes
Power Monitoring
4234E–SCR–09/04
Table 5. Power Modes Description
Number
Mode
1
2
3
4
5
Shutdown
Bit
0
0
0
1
1
Bit
LP
X
X
X
0
1
Two power-down modes are available to reduce the AT83C24 power consumption (see
STUTDOWN bit in CONFIG1 register and LP bits in CONFIG3 register).
To enter in the mode number 4 (see Table 5), the sequence is the following:
The AT83C24 exits Power-down if a software/hardware reset is done or if SHUTDOWN
bit is cleared. The AT83C24 is then active immediately.
Either a hardware reset or a TWI command clearing the SHUTDOWN bit can cause an
exit from Power-down. The internal registers retain their value during the shutdown
mode.
In Power-down mode, the device is sleeping and waiting for a wake up condition.
To reduce power consumption, the User should stop the clock on the CLK input after
setting the SHUTDOWN bit. The clock can be enabled again just before exiting SHUT-
DOWN (at least 10 µs before a START bit on SDA).
The AT83C24 needs only one power supply to run: VCC.
If the microcontroller outputs signals with a different electrical level, the host positive
supply is connected to EVCC.
EVCC and VCC pins can be connected together if they have the same voltage.
•
STEPREG
–
–
If EVCC and VCC have different electrical levels:
The EVCC pin and RESET pin should be connected with a resistor bridge. RESET
pin high level must be higher than VIH (see Table 19). When EVCC drops, RESET
pin level drops too. A deactivation sequence starts if a card was active.
X
X
X
0
1
First select the Low-power mode by setting the LP bit
The activation of the SHUTDOWN bit can then be done.
VCARD[1:0]
11
11
00
00
00
160 mA
Current
Typical
Supply
30 mA
70 mA
90 µA
30 µA
3 mA
Description
Step up mode: VCC = 3V, CVCC = 5V,
Icard
Icard
Regulator mode: VCC = 5.25V, CVCC = 5V,
Icvcc = 65mA
DC/DC off, CLK = 10MHz, VCC=3V to 5V
The TWI interface of the AT83C24 is active
but its analog blocs are switched off to reduce
the consumption
Pulsed mode of the internal 3V logic regulator
= 65mA
= 0
AT83C24
19